NC7SZ05L6X ,TinyLogic UHS Inverter (Open Drain Output)FeaturesThe NC7SZ05 is a single Inverter with open drain output
NC7SZ05L6X-NC7SZ05M5X-NC7SZ05P5X
TinyLogic UHS Inverter (Open Drain Output)
NC7SZ05 TinyLogic UHS Inverter (Open Drain Output) June 1997 Revised August 2004 NC7SZ05 TinyLogic UHS Inverter (Open Drain Output) General Description Features The NC7SZ05 is a single Inverter with open drain outputSpace saving SOT23 or SC70 5-lead package stage from Fairchild’s Ultra High Speed Series ofUltra small MicroPak leadless package TinyLogic. The device is fabricated with advanced CMOS Open drain output for OR tied applications technology to achieve ultra high speed with high output Ultra High Speed; t 1.9 ns Typ into 50 pF at 5V V drive while maintaining low static power dissipation over a PD CC very broad V operating range. The device is specified toHigh Output I Drive; +24 mA at 3V V CC OL CC operate over the 1.65V to 5.5V V range. The input and CCBroad V Operating Range; 1.65V to 5.5V CC output are high impedance when V is 0V. Inputs tolerate CC Matches the performance of LCX when operated at voltages up to 6V independent of V operating voltage. CC 3.3V V CC The open drain output stage tolerates voltages up to 6V Power down high impedance inputs/output independent of V when in the high impedance state. CC Overvoltage Tolerant inputs facilitate 5V to 3V translation Patented noise/EMI reduction circuitry implemented Ordering Code: Order Package Product Code Package Description Supplied As Number Number Top Mark NC7SZ05M5X MA05B 7Z05 5-Lead SOT23, JEDEC MO-178, 1.6mm 3k Units on Tape and Reel NC7SZ05P5X MAA05A Z05 5-Lead SC70, EIAJ SC-88a, 1.25mm Wide 3k Units on Tape and Reel NC7SZ05L6X MAC06A C6 6-Lead MicroPak, 1.0mm Wide 5k Units on Tape and Reel Logic Symbol Connection Diagrams IEEE/IEC Pin Assignments for SOT23 and SC70 Pin Descriptions Pin Names Description A Input (Top View) YOutput NC No Connect Pad Assignments for MicroPak Function Table Y = A Input Output AY L*H HL (Top Thru View) H = HIGH Logic Level L = LOW Logic Level *H = HIGH Impedance output state (Open Drain) TinyLogic is a registered trademark of . MicroPak are trademarks of . © 2004 DS012174