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NC7NZU04K8XFAIRCHILD N/a5726avaiTinyLogic UHS Unbuffered Inverter


NC7NZU04K8X ,TinyLogic UHS Unbuffered Inverterapplications. The

NC7NZU04K8X
TinyLogic UHS Unbuffered Inverter
NC7NZU04 TinyLogic UHS Unbuffered Inverter July 2001 Revised January 2005 NC7NZU04 TinyLogic UHS Unbuffered Inverter General Description Features The NC7NZU04 is a triple unbuffered inverter fromSpace saving US8 surface mount package Fairchild’s Ultra High Speed Series of TinyLogic. TheMicroPak Pb-Free leadless package special purpose unbuffered circuit design is primarily Unbuffered for crystal oscillator and analog applications intended for crystal oscillator or analog applications. The Balanced Output Drive; ± 8 mA at 4.5V V device is fabricated with advanced CMOS technology to CC achieve ultra high speed with high output drive while main-Broad V Operating Range: 1.65V to 5.5V CC taining low static power dissipation over a very broad V CCLow Quiescent Power; operating range. The device is specified to operate over I < 1 μA, V = 5.5V, T = 25°C CC CC A the 1.65V to 5.5V V range. CC Ordering Code: Product Order Package Code Package Description Supplied As Number Number Top Mark NC7NZU04K8X MAB08A 7NZU4 8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide 3k Units on Tape and Reel NC7NZU04L8X MAC08A U6 Pb-Free 8-Lead MicroPak, 1.6 mm Wide 5k Units on Tape and Reel Pb-Free package per JEDEC J-STD-020B. Logic Symbol Connection Diagrams IEEE/IEC (Top View) Pin Descriptions Pin Names Description A Input YOutput AAA represents Product Code Top Mark - see ordering code Note: Orientation of Top Mark determines Pin One location. Read the Top Function Table Product Code Mark left to right, Pin One is the lower left pin (see diagram). Pad Assignment for MicroPak Y = A Input Output AY LH HL H = HIGH Logic Level L = LOW Logic Level (Top Thru View) TinyLogic is a registered trademark of . MicroPak is a trademark of . © 2005 DS500490
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