NB3H83905C ,Clock Fanout Buffer, Crystal Input 1:6 LVTTL/LVCMOS, with Output EnableBlock Diagram Semiconductor Components Industries, LLC, 2012 1 Publication Order Number:November, ..
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NB3H83905C
Clock Fanout Buffer, Crystal Input 1:6 LVTTL/LVCMOS, with Output Enable
NB3H83905C
1.8V/2.5V/3.3V Crystal Input
to 1:6 LVTTL/L VCMOS Clock
Fanout Buffer with OE
Description
The NB3H83905C is a 1.8 V , 2.5 V or 3.3 V VDD core Crystal input
to 1:6 LVTTL/LVCMOS fanout buffer with outputs powered by
flexible 1.8 V, 2.5 V, or 3.3 V supply VDDO (with VDD VDDO). The
device accepts a fundamental Parallel Resonant crystal from 3 MHz to
40 MHz or a singleïended LVCMOS Clock from up to 100 MHz.
Two synchronous LVTTL/LVCMOS Enable lines permit
independent control over outputs BCLK[0:4] and output BCLK5;
enabling or disabling only when the output is in LOW state
eliminating potential output glitching or runt pulse generation. When
unused, leave floating open, pins will default to HIGH state.
The 6 outputs drive 50 series or parallel terminated transmission
lines. Parallel termination should be to 1/2 VCC. Series terminated
lines can drive 2 loads each, or 12 lines total.
Fit, Form, and Function compatible with ICS83905 and PI6C10806.
Features Six Copies of LVTTL/LVCMOS Output Clock Supply Operation VDD VDDO: 1.8 V0.2 V , 2.5 V 5% or 3.3 V 5% Core VDD 1.8 V0.2 V , 2.5 V 5%, or 3.3 V 5% Output VDDO Crystal Oscillator Interface Crystal Input Frequency Range: 3 MHz to 40 MHz Clock Input Frequency Range: Up to 100 MHz LVCMOS compatible Enable Inputs 5 V Tolerant Enable Inputs Low Output to Output Skew: 80 ps Max Synchronous Output Enable Phase Noise Floor ï160 dBc (1 MHz) Industrial Temperature Range These are PbïFree Devices
BCLK0
BCLK1
BCLK2
BCLK3
BCLK4
BCLK5
SYNC
SYNC
XTAL_IN/CLK
XTAL_OUT
ENABLE1
ENABLE2
MARKING
DIAGRAMS*
*For additional marking information, refer to
Application Note AND8002/D.
SOICï16
D SUFFIX
CASE 751B
See detailed ordering and shipping information in the package
dimensions section on page 11 of this data sheet.
ORDERING INFORMATION
http://
TSSOPï16
DT SUFFIX
CASE 948F
(*Note: Microdot may be in either location)
QFN20
MN SUFFIX
CASE 485BH NB3H
905C
ALYW = Assembly Location = Wafer Lot, Y = Year
WW, W = Work Week
G or = PbïFree Package
NB3H83905G
ALYYWW
NB3H
ALYW
