N74F541D ,Octal inverter buffer 3- StatePIN CONFIGURATION – 74F541OE0 V1 20 CCOE0 V1 20 CCI0 OE12 19I0 OE12 19I1 Y03 18I1 Y03 18I2 Y14 17I2 ..
N74F543D ,Octal latched transceiver with dual enable; 3-state
N74F543D ,Octal latched transceiver with dual enable; 3-state
N74F543D ,Octal latched transceiver with dual enable; 3-state
N74F552D ,Octal registered transceiver with parity and flags 3-State
N74F564D ,Octal D flip-flop 3-State
NFM18CC223R1C3D , EMIFIL (Capacitor type) Single Circuit Type for Signal Lines
NFM18CC223R1C3D , EMIFIL (Capacitor type) Single Circuit Type for Signal Lines
NFM18CC471R1C3D , EMIFIL (Capacitor type) Single Circuit Type for Signal Lines
NFM18CC471R1C3D , EMIFIL (Capacitor type) Single Circuit Type for Signal Lines
NFM18PC105R0J3D , EMIFILr (Capacitor type) Single Circuit Type for Large Current
NFM18PC105R0J3D , EMIFILr (Capacitor type) Single Circuit Type for Large Current
N74F540D-N74F541D
Octal inverter buffer 3- State
Product specification
IC15 Data Handbook
1990 Jan 08
Philips Semiconductors Product specification
74F540, 74F541Buffers74F540 Octal Inverter Buffer (3-State)
74F541 Octal Buffer (3-State)
FEATURES High impedance NPN base inputs for reduced loading
(20μA in High and Low states) Low power, light bus loading Functionally similar to the 74F240 and 74F241 Provides ideal interface and increases fan-out of MOS
microprocessors Efficient pinout to facilitate PC board layout Octal bus interface 3-State buffer outputs sink 64mA 15mA source current
DESCRIPTIONThe 74F540 and 74F541 are octal buffers that are ideal for driving
bus lines or buffer memory address registers. The outputs are
capable of sinking 64mA and sourcing up to 15mA, producing very
good capacitive drive characteristics. The devices feature input and
outputs on opposite sides of the package to facilitate printed circuit
board layout.
ORDERING INFORMATION
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
NOTE: One (1.0) FAST Unit Load is defined as: 20μA in the High state and 0.6mA in the Low state.
PIN CONFIGURATION – 74F540
PIN CONFIGURATION – 74F541
Philips Semiconductors Product specification
74F540, 74F541Buffers
LOGIC SYMBOL – 74F540
LOGIC SYMBOL – 74F541
LOGIC SYMBOL (IEEE/IEC) – 74F540
LOGIC SYMBOL (IEEE/IEC) – 74F541
LOGIC DIAGRAM – 74F540
LOGIC DIAGRAM – 74F541
Philips Semiconductors Product specification
74F540, 74F541Buffers
FUNCTION TABLE= High voltage level= Low voltage level= Don’t care= High impedance “off” state
ABSOLUTE MAXIMUM RATINGS(Operation beyond the limits set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)
RECOMMENDED OPERATING CONDITIONS
Philips Semiconductors Product specification
74F540, 74F541Buffers
DC ELECTRICAL CHARACTERISTICS(Over recommended operating free-air temperature range unless otherwise noted.)
NOTES: For conditions shown as MIN or MAX, use the appropriate value under the recommended operating conditions for the applicable type. All typical values are at VCC = 5V, Tamb = 25°C. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, IOS should be performed last.
Philips Semiconductors Product specification
74F540, 74F541Buffers
AC ELECTRICAL CHARACTERISTICS
AC WAVEFORMSFor all waveforms, VM = 1.5V.
Waveform 1. Propagation Delay Data to Outputs for 74F540
Waveform 2. Propagation Delay Data to Outputs for 74F541
Waveform 3. 3-State Output Enable Time to High Level
and Output Disable Time from High Level
Waveform 4. 3-State Output Enable Time to Low Level
and Output Disable Time from Low Level
