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MX7847JN-MX7847JR-MX7847KR
Complete / Dual / 12-Bit Multiplying DACs
_______________General DescriptionThe MX7837/MX7847 are dual, 12-bit, multiplying, volt-
age-output digital-to-analog converters (DACs). Each
DAC has an output amplifier and a feedback resistor.
The output amplifier is capable of developing ±10V
across a 2kΩload. The amplifier feedback resistor is
internally connected to VOUTon the MX7847. No exter-
nal trims are required to achieve full 12-bit performance
over the entire operating temperature range.
The MX7847 has a 12-bit parallel data input, whereas
the MX7837 operates with a double-buffered 8-bit-bus
interface that loads data in two write operations. All
logic signals are level triggered and are TTL and CMOS
compatible. Fast timing specifications make these
DACs compatible with most microprocessors.
________________________ApplicationsSmall Component-Count Analog Systems
Digital Offset/Gain Adjustments
Industrial Process Control
Function Generators
Automatic Test Equipment
Automatic Calibration
Machine and Motion Control Systems
Waveform Reconstruction
Synchro Applications
____________________________FeaturesTwo 12-Bit Multiplying DACs with Buffered
Voltage OutputSpecified with ±12V or ±15V SuppliesNo External Adjustments RequiredFast Timing Specifications24-Pin DIP and SO Packages12-Bit Parallel Interface (MX7847)
8-Bit + 4-Bit Interface (MX7837)
______________Ordering Information
Ordering Information continued on last page.* Contact factory for availability and processing to MIL-STD-883.
MX7837/MX7847
Complete, Dual, 12-Bit
Multiplying DACs
_________________Pin Configurations
_________Typical Operating Circuits19-0158; Rev 0; 7/93
MX7837/MX7847
Complete, Dual, 12-Bit
Multiplying DACs
ABSOLUTE MAXIMUM RATINGSVDDto DGND, AGNDA, AGNDB............................-0.3V to +17V
VSSto DGND, AGNDA, AGNDB (Note 1) ..............+0.3V to -17V
VREFA, VREFBto AGNDA, AGNDB ..(VSS- 0.3V) to (VDD+ 0.3V)
AGNDA, AGNDB to DGND.........................-0.3V to (VDD+ 0.3V)
VOUTA, VOUTBto AGNDA, AGNDB.....(VSS- 0.3V) to (VDD+ 0.3V)
RFBA, RFBBto AGNDA, AGNDB.......(VSS- 0.3V) to (VDD+ 0.3V)
Digital Inputs to DGND...............................-0.3V to (VDD+ 0.3V)
Continuous Power Dissipation (TA= +70°C)
NarrowPlastic DIP (derate 13.33mW/°C above +70°C)....1067mW
SO (derate 11.76mW/°C above +70°C).........................941mW
Narrow CERDIP (derate 12.50mW/°C above +70°C)..1000mW
Operating Temperature Ranges:
MX78_7J_/K_........................................................0°C to +70°C
MX78_7A_/B_ ..................................................-40°C to +85°C
MX78_7SQ/TQ ...............................................-55°C to +125°C
Storage Temperature Range............................-65°C to +150°C
Lead Temperature (soldering, 10sec).............................+300°C
ELECTRICAL CHARACTERISTICS(VDD= 11.4V to 16.5V, VSS= -11.4V to -16.5V, AGNDA = AGNDB = DGND = 0V, VREFA= VREFB= +10V, RL= 2kΩ, CL= 100pF,
VOUTconnected to RFB(MX7837), TA= TMINto TMAX, unless otherwise noted.) (Note 2)
Note 1:If VSSis open-circuited with VDDand either AGNDapplied, the VSSpin will float positive exceeding the Absolute Maximum Ratings.
If this possibility exists, a Schottky diode connected between VSSand GND ensures the maximum ratings will be observed.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
MX7837/MX7847
Complete, Dual, 12-Bit
Multiplying DACs
ELECTRICAL CHARACTERISTICS (continued)(VDD= 11.4V to 16.5V, VSS= -11.4V to -16.5V, AGNDA = AGNDB = DGND = 0V, VREFA= VREFB= +10V, RL= 2kΩ, CL= 100pF,
VOUTconnected to RFB(MX7837), TA= TMINto TMAX, unless otherwise noted.) (Note 1)
Note 2:The analog outputs can swing to within 2.5V of the supply rails. Hence, for good linearity towards full-scale, |VREFA| and |VREFB| must
be at least 2.5V lower than VDDand |VSS|. Tests done with supply voltages below ±12.5V are done with VREFA= VREFB= ±8.9V.
Note 3:Static performance tested at VDD= +15V, VSS= -15V. Performance over supplies guaranteed by PSRR test.
Note 4:Guaranteed by design.
MX7837/MX7847
Complete, Dual, 12-Bit
Multiplying DACs
__________________________________________Typical Operating Characteristics(TA= +25°C, VDD= 15V, VSS= -15V, RL= 2kΩ, CL= 100pF, unless otherwise noted)1k10k
OUTPUT VOLTAGE SWING
vs. RESISTIVE LOADLOAD RESISTANCE (Ω)
OUT
(V
p-p
100100k
NOISE SPECTRAL DENSITYFREQUENCY (Hz)
NOISE SPECTRAL DENSITY (nV/ Hz)
1001k10k
10010k10M
SMALL-SIGNAL FREQUENCY RESPONSEFREQUENCY (Hz)
GAIN (dB)
-20100k1M
-85100k
MULTIPLYING FEEDTHROUGH ERRORFREQUENCY (Hz)
ATTENUATION (dB)
10k1M
1001k10k
TOTAL HARMONIC DISTORTION + NOISE
vs. FREQUENCY (BANDWIDTH = 80kHz)FREQUENCY (Hz)
THD (dB)
10010k100k
TOTAL HARMONIC DISTORTION + NOISE
vs. FREQUENCY (BANDWIDTH > 500kHz)FREQUENCY (Hz)
THD (dB)
TIMING CHARACTERISTICS
(VDD= 11.4V to 16.5V, VSS= -11.4V to -16.5V, AGNDA = AGNDB = DGND = 0V, TA= TMINto TMAX, unless otherwise noted.) (Note 5)
Note 5:All input signals are specified with tR= tF≤5ns. Logic swing is 0V to 5V.
MX7837/MX7847
Complete, Dual, 12-Bit
Multiplying DACs
______________________________________________________________Pin Description
____________________________Typical Operating Characteristics (continued)(TA= +25°C, VDD= 15V, VSS= -15V, RL= 2kW, CL = 100pF, unless otherwise noted.)
MX7837/MX7847
_______________Detailed Description
D/A SectionFigure 1 shows a simplified circuit diagram for one of
the DACs and the output amplifier. Using a segmented
scheme, the two MSBs of the 12-bit data word are
decoded to drive the three switches (A to C). The
remaining 10 bits drive the switches (S0 to S9) in a
standard R-2R ladder.
Each switch (A to C) directs 1/4 of the total reference
current, and the remaining current passes through the
R-2R section.
The output amplifier and feedback resistor convert cur-
rent to voltage as follows: VOUT_= (-D)(VREF_), where D
is the fractional representation of the digital word. (D
can be set from 0 to 4095/4096.)
The output amplifier is capable of developing ±10V
across a 2kΩload. It is internally compensated and
settles to 0.01% FSR (1/2LSB) in less than 4µs. VOUT
on the MX7837 is not internally connected to RFB.
Interface Logic Information
(MX7847)Figure 2 shows the MX7847 input control logic. The
device contains two independent DACs, each with its
own CSinput and a common WRinput. CSAand WR
control data loading to the DAC A latch, and CSBandcontrol data loading to the DAC B latch. The latch-
es are edge triggered so that input data is latched to
the respective latch on WR's rising edge. The same
data will be latched to both DACs if CSAand CSBare
low and WRis taken high. Table 1 shows the device
control-logic truth table, and Figure 3 shows the write-
cycle timing diagram.
Table 1. MX7847 Truth TableX = Don't Care = Rising Edge Triggered
Interface Logic Information
(MX7837)The MX7837 input loading structure is configured for
interfacing with 8-bit-wide data-bus microprocessors.
Each DAC has two 12-bit latches: an input latch, and a
DAC latch. Each input latch is subdivided into a least-
significant 8-bit latch and a most-significant 4-bit latch.
The data held in the DAC latches determines the out-
puts. Figure 4 shows the MX7837 input control logic,
and Figure 5 shows the write-cycle timing diagram.
Complete, Dual, 12-Bit
Multiplying DACsFigure 2.MX7847 Input Control LogicFigure 3.MX7847 Write-Cycle Timing Diagram
