MX7520JN ,CMOS 10 and 12 Bit Multiplying D/A ConvertersApplications
Machine and Motion Control Systems
Automatic Test Equipment
yp Controlled Calibra ..
MX7520KN+ ,CMOS, 14- and 12-Bit Multiplying DACsApplications MX7520LN 0°C to r7(FC7 Plastic DIP 0,05%
MX7520 tr 7 . T _
Machine and Motion Contro ..
MX7520SD ,CMOS 10 and 12 Bit Multiplying D/A ConvertersFeatures
. 10 or 12 Bit Resolutlon
. 8, 9, and 10 Bit End Point Linearity
. Low Power Cons ..
MX7521JN ,CMOS 10 and 12 Bit Multiplying D/A ConvertersFeatures
. 10 or 12 Bit Resolutlon
. 8, 9, and 10 Bit End Point Linearity
. Low Power Cons ..
MX7521JN+ ,CMOS, 14- and 12-Bit Multiplying DACsWuan-eDem.
19-0936 flew 1 7195
lVI/JXI/VI
CMOS 10 and " Bit
Multiplying D/A Converters
..
MX7521JN+ ,CMOS, 14- and 12-Bit Multiplying DACsGeneral Description - Fen turn
The MX7520 and MX7521 are low cost CMOS multi- . 10 or 12 Bit Hesol ..
NDS335N_NL ,N-Channel Logic Level Enhancement Mode Field Effect TransistorElectrical Characteristics (T = 25°C unless otherwise noted)ASymbol Parameter Conditions Min Typ Ma ..
NDS336 ,P-Channel Logic Level Enhancement Mode Field Effect Transistorapplications such as notebook computer power management,Proprietary package design using copper lea ..
NDS351AN_NL ,N-Channel, Logic Level, PowerTrench MOSFETapplications in notebook computers, portable phones,• Industry standard outline SOT-23 surface moun ..
NDS352AP ,P-Channel Logic Level Enhancement Mode Field Effect TransistorGeneral Description
NDS352AP_NL ,P-Channel Logic Level Enhancement Mode Field Effect TransistorElectrical Characteristics (T = 25°C unless otherwise noted)ASymbol Parameter Conditions Min Typ Ma ..
NDS352AP_NL ,P-Channel Logic Level Enhancement Mode Field Effect Transistorapplicationsusing proprietary SuperSOT -3 design for superior thermalsuch as notebook computer pow ..
MX7520JCWE-MX7520JN-MX7520SD-MX7521JN-MX7521KN
CMOS 10 and 12 Bit Multiplying D/A Converters
19-0936; Rev 1, 7/95
2AlALill2aLAMl
CMOS " and " Bit
Multiplying D/A Converters
- General Description Features
The MX7520 and MX7521 are low cost CMOS multi- . 10 or 12 Bit Resolution
plying digital-to-analog converters (DACs) with 10
and 12 bit resolution respectively. Both DACs operate . 8, 9, and 10 Bit End Polnt Linearity
from a +5V to +15V supply and dissipate only 20mW. . Low Power Consumption - 20mW
Thin-film resistors provide typically 0.3% untrimmed . TTL and CMOS Compatible
gain error and 10ppm/°C gain temperature coeffi- - -
cient. All digital inputs are compatible with both . Pin For Pln Second Source
C cls and TTL logic levels . . Ordorlng Information
Maxim's MX7520 and MX7521 are electrically and pm
compatible with Analog Devices' AD7520 and AD7521. .
The MX7520 is packaged in a 16-lead DIP while the PART TEMP. RANGE PACKAGE ERROR
MX7521 is packaged in an 18-lead DIP. Both devices MX7520JN 0°C to +70°C Plastic DIP 0.2%
are also available in small outline (SO) packages. Mx7520KN tPC to o7ty'C Plastic mp th1%
Appmtatittrts C,xd',,'2lvv, 2‘: to CQ s'l,',C','2t',',. 2:5:
. . MX tlt t r70'' tli .
Machine and Motion Control Systems ' o ma u T
A t matic Test E ui ment MX7520KCWE 0 Clo +70°C Srnalloutline 0.1%
u o q p MX7520LCWE tPC to +70°c Small Outline 0.05%
pP Controlled Calibration Circuitry MX752tu/D" tPC to +70°C Dice 0.2%
Programmable Gain Amplifiers MX7520J0 -25°c to +05°C CERDIP" 0.2%
Digitally Controlled Filters MX7520KO -25°c to +85°c CERDIP" 0.1%
Programmable Power Supplies MX7520LO -25°c to r85''C CERDIP" 0.05%
MX7520JD -25°c to r85''G Ceramic 0.2%
Pin Ctonft"guratiott MX7520KD -25°C to +85''C Ceramic 0.1%
MX7520LD -25°C to +85°C Ceramic 0.05%
. MX752OSO -55°c to +125''C CERDIP" 0.2%
Top View MX7520TO -55°c to +125°c cenmp" 0.1%
MX7520UQ -55''C to +125°c CERDIP" 0.05%
mm , V R" MX7520SD 55''Ct q .
- C) +125 C Ceramic 0.2%
mm E is] hes MX7520TD -55''C to +125°c Ceramic 0.1%
tmo LC E Van '
MAXIM MX752OUD -55°C to +125°C Ceramic 0.05%
BIT! MSill LE MX7520 El BIT IOILSBI
. MX7520 - 16 lead package, MX7521 - 18 lead package.
illT t E E B" ' .. Maxim reserves the right to ship Ceramic packages in lieu of
BIT 3 E E BIT B CEBDIP packages. .
BIT 4 LE E ‘BIT 7 Ordering Informanon continued on last page.
an 5 I: Cs] an a Typical Operating Circuit
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Mil l: E V00 . an tom
" 1 mm LE MAX”, E BIT lt ILSB] mm
811' 2 E MX7521 E BIT II tN8llT m
BIT 3 [E CE " In n MAX400
BIT4 CE Tal BITE . MAXIM
BIT 5 E E BIT a "ra-" h DG303A
BIT B E E BIT7 got an
10 Bit Plus Sign Multiplying DAC
[MAXIM Maxlmlntegrated Products 1
Call toll free 1-800-998-8800 for free samples or literature.
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MX 7520/ MX 7521
CMOS " and " Bit
Multiplying D/A Converters
ABSOLUTE MAXIMUM RATINGS
VOD to GND ..................................... A13V, +17V Operating Temperature
VREF to GND . . Commercial (JN/KN/LN/JC/KC/LC) ........... 0''C to 00°C
Rm to GND ................... Industrial (JD/KD/LD/JQ/KQ/LQ) ...... . . -25''C to +85°C
Digital Input Voltage to GND ....................... Ai31/, VDD Military (S/T/U) ....................... . -55°C to +125°C
Output Voltage (OUT1, OUT2) (Note 1) .............. Ah3V, Vpp Storage Temperature .................... . AMPC to +150°C
Power Dissipation (Derata 6mWP'C above '75''C) ...... 450mW Lead Temperature (Soldering 10 secs) ................. '3ay'C
Stresses ubova those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional
operation of the device at these or any 01th conditions above those mdrcated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may alfact device reliability.
ELECTRICAL CHARACTERISTICS
(TA--+25'' C. Van =+ IW, VREF = +10V. Vour, = vow = GND, unless otherwise specified)
PARAMETER I SYMBOL I CONDITIONS I MIN. TYP. MAX. UNITS
Dc ACCURACY (Not. 2)
Resolution 3:33 I' Bits
Relative Accuracy (Note 3) 133315.33:fo (lit :32 =- , gilt: (fl 3312 % an
0.05% FSR ' 10 Bits L/U t0.05
Nonlinearity Ternpco -10V s V35; 5 +10V (Note 4) 2 ppm/''C
Gain Error -10V s Vresr s +10V (Note 5) 0.3 % FSR
Gain Error Ternpco -10V s Vaep s +10V (Note 4,5) 10 ppm/°c
Output Leakage Current OUT1 or OUT2, TA = Tum to TMAX 200 nA
Power Supply Rejection PSRR (Note a) 50 53:;
VREF Input Resistance RREF Rag; tempco = -150ppm/°C typ. 5 10 20 kn
Att ACCURACY
Output Current Settling Time T 0.05% of FSR, all digital inputs 500 ns
(Note 3) high to low and low to high.
Feedthrough Error All digitat inputs low, VREF = 20Wor, 10 "MW
(Note 3,4,6) 100kHz stnewave.
ANALOG OUTPUTS
All digital inputs high, 83;; 13270
Output Capacitance (Note 3) Cour OUT1 37 pF 1
All digital inputs tow, OUT2 120 ''
Output Noise (Note 3) cu Both outputs, equivalent Johnson noise resistance 10 kn
DIGITAL INPUTS (TA . Tum to Tox l
Low State Threshold VINL 0.8 v
High State Threshold VIN” 2.4 V
Input Current Low to high state tl “A
Input Coding , Unipolar (Table 1), Bipolar (Table 2) Binary. Offset Binary
POWER REQUIREMENTS
Power Supply Range VDD +5 +15 5 V
PowiarSupplyCurrent lot; 'iiittdl'/n"p"/,ttyr1,tgth,w 5 2 ' :2
Total Power Dissipation Including VREF 20 mW
Note 12Vou‘r1.2 may exceed the Absolute Maximum voltage if the current is limited to 30mA or less
Note 2: Full Scale Range is 10V tor unipolar mode and t10V for bipolar mode.
Note 3: See Test Circuits.
Note q.. Guaranteed by design but not 100% tested.
Note 5: Using internal feedback resistor, Rm.
Note 6: To minimize teedthrough with the ceramic package, the metal lid must be grounded. If the lid is not grounded, then the feed-
through is 10mV typical and 30mV maximum,
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