MPC9449 ,3.3V/2.5V 1:15 PECL/LVCMOS Clock Fanout BufferFunctional DescriptionThe MPC9449 is specifically designed to distribute LVCMOScompatible clock sig ..
MPC9456 ,MPC9456 2.5V and 3.3V LVCMOS Clock Fanout BufferLogic DiagramV is internally connected to VCCB CC24 23 22 21 20 19 18 1725 16 QC3VCCA26 15 GNDQA227 ..
MPC9456FA , 2.5V AND 3.3V LVCMOS CLOCK FANOUT BUFFER
MPC9456FA , 2.5V AND 3.3V LVCMOS CLOCK FANOUT BUFFER
MPC9456FA , 2.5V AND 3.3V LVCMOS CLOCK FANOUT BUFFER
MPC946 ,LOW VOLTAGE 1:10 CMOS CLOCK DRIVERLOGIC DIAGRAM(Int Pull Down)TCLK_Sel(Int Pull Up)÷1TCLK000÷2 3(Int Pull Up)1TCLK1 Qa0:2R1(Int Pull ..
MSP430F112IPW ,MIXED SIGNAL MICROCONTROLLERfeaturesa powerful 16-bit RISC CPU, 16-bit registers, and constant generators that attribute to max ..
MSP430F112IPWR ,16-Bit Ultra-Low-Power Microcontroller, 4kB Flash, 256B RAM 20-TSSOP -40 to 85 SLAS256D − NOVEMBER 1999 − REVISED SEPTEMBER 2004 Low Supply Vol ..
MSP430F1132 ,16-bit Ultra-Low-Power Microcontroller, 8kB Flash, 256B RAM, 10 bit ADCfeaturesa powerful 16-bit RISC CPU, 16-bit registers, and constant generators that attribute to max ..
MSP430F1132IDW ,16-bit Ultra-Low-Power Microcontroller, 8kB Flash, 256B RAM, 10 bit ADCfeaturesa powerful 16-bit RISC CPU, 16-bit registers, and constant generators that attribute to max ..
MSP430F1132IDWR ,16-bit Ultra-Low-Power Microcontroller, 8kB Flash, 256B RAM, 10 bit ADC SLAS361D − JANUARY 2002 − REVISED AUGUST 2004 Lo ..
MSP430F1132IPW ,16-bit Ultra-Low-Power Microcontroller, 8kB Flash, 256B RAM, 10 bit ADC SLAS361D − JANUARY 2002 − REVISED AUGUST 2004 Lo ..
MPC9449
3.3V/2.5V 1:15 PECL/LVCMOS Clock Fanout Buffer
SEMICONDUCTOR TECHNICAL DATA
Order Number: MPC9449/D
Rev 1, 08/2002--"!"
The MPC9449 is a 3.3V or 2.5V compatible, 1:15 clock fanout buffer
targeted for high performance clock tree applications. With output
frequencies up to 200 MHz and output skews less than 200 ps the device
meets the needs of the most demanding clock applications.
Features• 15 LVCMOS compatible clock outputs Two selectable LVCMOS and one differential LVPECL compatible clock
inputs Selectable output frequency divider (divide-by-one and divide-by-two) Maximum clock frequency of 200 MHz Maximum clock skew of 200 ps High-impedance output control 3.3V or 2.5V power supply Drives up to 30 series terminated clock lines Ambient temperature range –40°C to +85°C 52 lead LQFP packaging Supports clock distribution in networking, telecommunication and
computing applications Pin and function compatible to MPC949
Functional DescriptionThe MPC9449 is specifically designed to distribute LVCMOS
compatible clock signals up to a frequency of 200 MHz. The device has
15 identical outputs, organized in 4 output banks. Each output bank
provides a retimed or frequency divided copy of the input signal with a
near zero skew. The output buffer supports driving of 50Ω terminated
transmission lines on the incident edge: each output is capable of driving
either one parallel terminated or two series terminated transmission lines.
Two selectable LVCMOS compatible clock inputs are available. This feature supports redundant differential clock sources. In
addition, the MPC9449 accepts one differential PECL clock signal. The DSELx pins choose between division of the input
reference frequency by one or two. The frequency divider can be set individually for each of the four output banks. Applying the
OE control will force the outputs into high-impedance mode.
All inputs have an internal pull-up or pull-down resistor preventing unused and open inputs from floating. The device supports a
2.5V or 3.3V power supply and an ambient temperature range of –40°C to +85°C. The MPC9449 is pin and function compatible
but performance-enhanced to the MPC949. The device is packaged in a 52-lead LQFP package.