MM74HCT04N ,Hex InverterElectrical CharacteristicsV = 5.0V, t = t = 6 ns C = 15 pF, T = 25°C (unless otherwise noted)CC r f ..
MM74HCT04SJX ,Hex Inverterfeatures low power dissipation and fast switchingtimes. All inputs are protected from static discha ..
MM74HCT05M ,Hex Inverter (Open Drain)FeaturesThe MM74HCT05 is a logic function fabricated by using
MM74HCT04M-MM74HCT04MTC-MM74HCT04MTCX-MM74HCT04MX-MM74HCT04N-MM74HCT04SJX
Hex Inverter
MM74HCT04 Hex Inverter February 1984 Revised January 2005 MM74HCT04 Hex Inverter General Description Features The MM74HCT04 is a logic function fabricated by usingTTL, LS pin-out and threshold compatible advanced silicon-gate CMOS technology which providesFast switching: t , t =12 ns (typ) PLH PHL the inherent benefits of CMOS - low quiescent power and Low power: 10 μW at DC, 3.7 mW at 5 MHz wide power supply range. This device is input and output High fanout: ≥ 10 LS loads characteristic as well as pin-out compatible with standard 74LS logic families. The MM74HCT04, triple buffered, hexInverting, triple buffered inverters, features low power dissipation and fast switching times. All inputs are protected from static discharge by internal diodes to V and ground. CC MM74HCT devices are intended to interface between TTL and NMOS components and standard CMOS devices. These parts are also plug-in replacements for LS-TTL devices and can be used to reduce power consumption in existing designs. Ordering Code: Package Order Number Package Description Number MM74HCT04M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow MM74HCT04SJ M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MM74HCT04MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide MM74HCT04N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide MM74HCT04N_NL N14A Pb-Free 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Pb-Free package per JEDEC J-STD-020B. Connection Diagram Pin Assignments for DIP, SOIC, SOP and TSSOP Top View © 2005 DS005357
