MM74HC86 ,Quad 2-Input Exclusive OR GateFeaturesspeeds similar to equivalent LS-TTL gates while maintain-ing the low power consumption and ..
MM74HC86M ,Quad 2-Input Exclusive OR GateFeaturesThe MM74HC86 EXCLUSIVE OR gate utilizes advanced
MM74HC86
Quad 2-Input Exclusive OR Gate
MM74HC86 Quad 2-Input Exclusive OR Gate September 1983 Revised February 1999 MM74HC86 Quad 2-Input Exclusive OR Gate inputs are protected from damage due to static discharge General Description by internal diode clamps to V and ground. CC The MM74HC86 EXCLUSIVE OR gate utilizes advanced silicon-gate CMOS technology to achieve operating Features speeds similar to equivalent LS-TTL gates while maintain- ing the low power consumption and high noise immunity � Typical propagation delay: 9 ns characteristic of standard CMOS integrated circuits. These � Wide operating voltage range: 2–6V gates are fully buffered and have a fanout of 10 LS-TTL � Low input current: 1 μA maximum loads. The 74HC logic family is functionally as well as pin � Low quiescent current: 20 μA maximum (74 Series) out compatible with the standard 74LS logic family. All � Output drive capability: 10 LS-TTL loads Ordering Code: Order Number Package Number Package Description MM74HC86M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow MM74HC86SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MM74HC86MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide MM74HC86N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Pin Assignments for DIP, SOIC, SOP and TSSOP Top View Truth Table Inputs Outputs AB Y LL L LH H HL H HH L Y = A ⊕ B = A B + AB © 1999 DS005305.prf
