MM74HC574MTCX ,3-STATE Octal D-Type Edge-Triggered Flip-FlopMM74HC574 3-STATE Octal D-Type Edge-Triggered Flip-FlopSeptember 1983Revised January 2003MM74HC5743 ..
MM74HC574N ,3-STATE Octal D-Type Edge-Triggered Flip-FlopGeneral Descriptionstorage elements.The MM74HC574 high speed octal D-type flip-flops utilizeThe 74H ..
MM74HC574SJ ,3-STATE Octal D-Type Edge-Triggered Flip-FlopGeneral Descriptionstorage elements.The MM74HC574 high speed octal D-type flip-flops utilizeThe 74H ..
MM74HC574SJX ,3-STATE Octal D-Type Edge-Triggered Flip-FlopElectrical CharacteristicsV = 5V, T = 25°C, t = t = 6 nsCC A r f GuaranteedSymbol Parameter Conditi ..
MM74HC574SJX ,3-STATE Octal D-Type Edge-Triggered Flip-FlopElectrical CharacteristicsV = 5V, T = 25°C, t = t = 6 nsCC A r f GuaranteedSymbol Parameter Conditi ..
MM74HC574WM ,3-STATE Octal D-Type Edge-Triggered Flip-FlopMM74HC574 3-STATE Octal D-Type Edge-Triggered Flip-FlopSeptember 1983Revised January 2003MM74HC5743 ..
MN673273 ,Microcomputers Application-Specific Standard-Product ICsFeatures• Input: Analog signal (A/D converter input)• Outputs: Digital outputs8-bit Y signal8-bit C ..
MN6732741 ,For Video稟udioVideo Camera LSIsMN6732741Signal-processing IC for surveillance cameras and cameras for PC input O ..
MN673744HL ,For Information·CommunicationDATA SHEETMN673744Part No.MN673744HLMLGA239-C-1111Package Code No.LQFP208-P-2828SEMICONDUCTOR COMPA ..
MN673747 ,For Information·CommunicationApplicationsDVD recorders, multimedia PCs, HDD-equipped products and TV/PDP display units
MN673747HL ,For Information·CommunicationDATA SHEETMN673747Part No.MN673747HLMLGA239-C-1111Package Code No.LQFP176-P-2424BSEMICONDUCTOR COMP ..
MN673794 ,For Video稟udioFeatures ▪ Analog input block Composite video/Component Y input (10 bits at 27.0 MHz) Component C i ..
MM74HC574MTC-MM74HC574MTCX-MM74HC574N-MM74HC574SJ-MM74HC574SJX-MM74HC574WM-MM74HC574WMX
3-STATE Octal D-Type Edge-Triggered Flip-Flop
MM74HC574 3-STATE Octal D-Type Edge-Triggered Flip-Flop September 1983 Revised January 2003 MM74HC574 3-STATE Octal D-Type Edge-Triggered Flip-Flop signals are present at the other inputs and the state of the General Description storage elements. The MM74HC574 high speed octal D-type flip-flops utilize The 74HC logic family is speed, function, and pinout com- advanced silicon-gate P-well CMOS technology. They pos- patible with the standard 74LS logic family. All inputs are sess the high noise immunity and low power consumption protected from damage due to static discharge by internal of standard CMOS integrated circuits, as well as the ability diode clamps to V and ground. CC to drive 15 LS-TTL loads. Due to the large output drive capability and the 3-STATE feature, these devices are ide- Features ally suited for interfacing with bus lines in a bus organized system. Typical propagation delay: 18 ns These devices are positive edge triggered flip-flops. Data Wide operating voltage range: 2V–6V at the D inputs, meeting the set-up and hold time require- Low input current: 1 μA maximum ments, are transferred to the Q outputs on positive going Low quiescent current: 80 μA maximum transitions of the CLOCK (CK) input. When a high logic level is applied to the OUTPUT CONTROL (OC) input, allCompatible with bus-oriented systems outputs go to a high impedance state, regardless of what Output drive capability: 15 LS-TTL loads Ordering Code: Order Number Package Number Package Description MM74HC574WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide MM74HC574SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MM74HC574MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide MM74HC574N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Truth Table Pin Assignments for DIP, SOIC, SOP and TSSOP Output Clock Data Output Control L ↑ HH L ↑ LL LL X Q 0 HX X Z H = HIGH Level L = LOW Level X = Don't Care ↑ = Transition from LOW-to-HIGH Z = High Impedance State Q = The level of the output before steady state input conditions were 0 established Top View © 2003 DS005213
