MM74C93N ,4-Bit Binary CounterElectrical Characteristics” providesconditions for actual device operation.(Soldering, 10 seconds) ..
MM74C93N ,4-Bit Binary CounterFeaturesThe MM74C93 binary counter and complementary MOS
MM74C93N
4-Bit Binary Counter
MM74C93 4-Bit Binary Counter October 1987 Revised January 2004 MM74C93 4-Bit Binary Counter General Description Features The MM74C93 binary counter and complementary MOSWide supply voltage range: 3V to 15V (CMOS) integrated circuits constructed with N- and P-Guaranteed noise margin: 1V channel enhancement mode transistors. The 4-bit binary High noise immunity: 0.45 V (typ.) CC counter can be reset to zero by applying high logic level on Low power compatibility: inputs R and R , and a separate flip-flop on the A-bit 01 02 Fan out of 2 TTL driving 74L enables the user to operate it as a divide-by-2, -8, or -16 divider. Counting occurs on the negative going edge of theThe MM74C93 follows the MM74L93 Pinout input pulse. All inputs are protected against static discharge damage. Ordering Code: Order Number Package Number Package Description MM74C93N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Connection Diagram Truth Table 4-Bit Binary Counter Binary Count Sequence Count Output Q Q Q Q D C B A 0 L LLL 1L L L H 2L L H L 3L L H H 4L H L L 5L H L H 6L H H L 7L H H H 8 H LLL 9H L L H Top View 10 HL HL Logic Diagram 11 H L H H 12 H H L L 13 H H L H 14 HHH L 15 HHH H Output Q is connected to input B for binary count sequence. A H = HIGH Level L = LOW Level X = Irrelevant © 2004 DS005889
