MM74C32N ,Quad 2-Input OR GateMM74C32 Quad 2-Input OR GateOctober 1987Revised January 2004MM74C32Quad 2-Input OR Gate
MM74C373N ,3-STATE Octal D-Type LatchFeaturesThe MM74C373 and MM74C374 are integrated, comple-
MM74C32N
Quad 2-Input OR Gate
MM74C32 Quad 2-Input OR Gate October 1987 Revised January 2004 MM74C32 Quad 2-Input OR Gate General Description Features The MM74C32 employs complementary MOS (CMOS)Wide supply voltage range: 3.0V to 15V transistors to achieve low power and high noise margin,Guaranteed noise margin: 1.0V these gates provide the basic functions used in the imple- High noise immunity: 0.45V V (typ.) CC mentation of digital integrated circuit systems. The N- and Low power TTL compatibility: fan out of 2 driving 74L P-channel enhancement mode transistors provide a sym- metrical circuit with output swings essentially equal to the supply voltage. This results in high noise immunity over a wide supply voltage range. No DC power other than that caused by leakage current is consumed during static con- ditions. All inputs are protected against static discharge damage. Ordering Code: Order Number Package Number Package Description MM74C32N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Connection Diagram Top View © 2004 DS005881
