MM74C174MX , Hex D-Type Flip-FlopFeaturesThe MM74C174 hex D-type flip-flop is a monolithic comple- Wide supply voltage range: 3.0V ..
MM74C174N ,Hex D-Type Flip-FlopFeaturesThe MM74C174 hex D-type flip-flop is a monolithic comple- Wide supply voltage range: 3.0V ..
MM74C175N ,Quad D-Type Flip-FlopFeaturesThe MM74C175 consists of four positive-edge triggered D-
MM74C174MX
Hex D-Type Flip-Flop
MM74C174 Hex D-Type Flip-Flop October 1987 Revised January 1999 MM74C174 Hex D-Type Flip-Flop General Description Features The MM74C174 hex D-type flip-flop is a monolithic comple- � Wide supply voltage range: 3.0V to 15V mentary MOS (CMOS) integrated circuit constructed with � Guaranteed noise margin: 1.0V N- and P-channel enhancement transistors. All have a � High noise immunity: 0.45 V (typ.) CC direct clear input. Information at the D inputs meeting the � Low power TTL compatibility: setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. Clear is inde- Fan out of 2 driving 74L pendent of clock and accomplished by a low level at the clear input. All inputs are protected by diodes to V and CC GND. Ordering Code: Order Number Package Number Package Description MM74C174M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow MM74C174N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Connection Diagram Truth Table Pin Assignments for DIP and SOIC Inputs Output Clear Clock D Q LX X L H ↑ HH H ↑ LL HL X Q Top View © 1999 DS005899.prf
