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MM54HC280J-MM74HC280N
9-Bit Odd/Even Parity Generator/Checker
TL/F/5121
MM54HC280/MM74HC280
9-Bit
Odd/Even
Parity
Generator/Checker
January 1988
MM54HC280/MM74HC280
9-Bit Odd/Even Parity Generator/Checker
General Description
The MM54HC280/MM74HC280 utilizes advanced silicon-
gate CMOS technologyto achievethe high noise immunity
andlow power consumptionof standard CMOS integrated
circuits.It possessesthe abilityto drive10 LS-TTL loads.
This parity generator/checker features odd/even outputsto
facilitate operationof eitheroddor even parity applications.
The word length capabilityis easily expandedby cascading
devices. The 54HC/74HC logic familyis speed, function,
and pinout compatible withthe standard 54LS/74LS family.
All inputsare protected from damage dueto staticdis-
chargeby internal diode clampsto VCCand ground.
Features Typical propagation delay:28ns Wide power supply range: 2V–6V Low quiescent current:80mA maximum (74HC) Low input current:1mA maximum Fanoutof10 LS-TTL loads
Connection Diagram
Dual-In-Line Package
TL/F/5121–1
OrderNumber MM54HC280orMM74HC280
Function Table
Numbersof InputsA Outputs
thru1 that areHigh R Even ROdd
0,2, 4,6,8 H L
1,3, 5,7,9 L Hehigh level,Lelowlevel
C1995National SemiconductorCorporation RRD-B30M105/PrintedinU.S.A.
