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MM54C74J
Dual D Flip-Flop
TL/F/5885
MM54C74/MM74C74
Dual
Flip-Flop
February 1988
MM54C74/MM74C74 DualD Flip-Flop
General Description
The MM54C74/MM74C74 dualD flip-flopisa monolithic
complementary MOS (CMOS) integrated circuit constructed
withN-and P-channel enhancement transistors. Eachflip-
flophas independent data, preset, clear and clock inputs
andQ andQ outputs. The logic level presentatthe data
inputis transferredtothe output duringthe positive going
transitionofthe clock pulse. Presetor clearis independentthe clockand accomplishedbyalow levelatthe preset clear input.
Features Supply voltage range 3Vto15V Tenth power TTL compatible Drive2 LPT2L loads High noise immunity 0.45 VCC (typ.) Low power 50nW (typ.) Medium speed operation 10 MHz (typ.)
with 10V supply
Applications Automotive Data terminals Instrumentation Medical electronics Alarm system Industrial electronics Remote metering Computers
Logic Diagram
TL/F/5885–1
Truth Table
Preset Clear Qn Qn 0 0 1 0 0 1 *Qn *Qn
*No changein outputfrom previous state.
Order Number MM54C74or MM74C74
Connection Diagram
Dual-In-Line Package
TL/F/5885–2TopView
Note:Alogic‘‘0’’onclearsetsQtologic‘‘0’’.logic‘‘0’’on presetsetsQto logic‘‘1’’.
C1995National SemiconductorCorporation RRD-B30M105/PrintedinU.S.A.
