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TA within operating temperature range Vss = 5V 1-596, VGG = -t2V i596, ..
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MM5321N
+0.3 to -22V; TV camera sync generator
Semiconductor
MM5321 TV camera sync generator
general description features
The MM5321 TV camera sync generator is a MOS, I Multi-function gen lock input provides flexible cont
P-channel enhancement mode, LSI chip designed to trol of multiple camera installations _ '
supply the basic sync functions for either color or
monochrome 525 line/60 Hz interlaced camera and
video recorder applications. Required power supplies
are +5V and --12V, or any other combination resulting
in vss - 17V. All inputs and outputs are TTL compa-
tible without the use of external components.
16-Iead dual-in-line package,
Conventional +5V, -12V power supplies
Uses 2.04545 MHz or 1.260 MHz inpu't reference
Field indexing provided for VTR applications
Color burst gate and sync allow stable color operation
National TelevisionIRadio
logic and connection diagrams
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Order Number MM5321N
Sea Package 19
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MM5321§
absolute maximum ratings
Voltage at Any Pin Vss + 0.3 to Vss - 22
Operating Temperature 0°C to +70°C
Storage Temperature -65°C to +150°C
Lead Temperature (Soldering, 10 seconds) 300°C
dc electrical characteristics
TA within operating temperature range Vss = BV 1-596, VGG = -t2V 15%, unless otherwise stated.
PARAMETER CONDITIONS MIN MAX UNITS
Input Levels
VIH Logical Hign Level Vss--1.5 Vss+0.3 V
VIL Logical Low Level Vss-18 V5342 V
Input Leakage VIN = -10V, TA = 25°C, 0.5 PA
All Other Pins GND
Input Capacitance VIN = 0V, f = 1 MHz, 6 pF
All Other Pins GND, (Note 1)
Clock Input Leakage VIN = --10V, TA = 25°C. 0.5 “A
All Other Pins GND
Clock Input Capacitance VIN = 0V, f = 1 MHz, 6 pF
All Other Pins GND, (Note 1)
Output Levels
VOH Logical High Level ‘SOURCE = --0.5 mA 2.4 vss A/
VOL Logical Low Level ISINK = 1.6 mA 0.4 V
MOS Load VSS-12.5 VSS-9 V
IGG Power Supply Current TA = 25°C, VGG = --12V, 36 mA
dbpw = 235 ns, vss = 5V,
Input Clock Frequency =
2.04545 MHz
ac electrical characteristics
TA within operating temperature range vss = 5V t5%, VGG = -12V i596, unless otherwise stated.
PARAMETER CONDITIONS MIN MAX UNITS
¢pw Input Clock Pulse Width Input Clock Frequency = 190 280 ns
2.04545 MHz, ¢tr, " = 20 ns
Input Clock Frequency = 1.26 MHz, 300 570 ns
m, = ¢tf = 20 ns
Horizontal Reset Pulse Width Within 400 ns after the Falling Edge 500 800 ns
of Master Clock, (Figure 5)
Rise and Fall Time = 20 ns
tpd Output Propagation Delay
VOH Logical High Level Capacitance at the Output = 15 pF 750 ns
VOL Logical- Low" Level (Figure 5) 750 ns
Note 1: Capacitance is guaranteed by periodic testing.
functional description
EXTERNAL CONTROL LEVELS
Horizontal Reset occurs for Logic "0." This resets the
horizontal counter to a state shown in Figures 2 and 3.
Vertical Reset occurs for Logic "th" This resets the
vertical counter to a state determined by reset control
input as shown below:
VERTICAL RESET PERMITS THE VE RTiCAL
CONTROL INPUT COUNTER TO RESET TO THE:
VIH, (Vssl 0th count
VIL. (VGGl ch count
HORIZONTAL RESET RESETS THE HORIZONTAL
CONTROL INPUT DIVIDER T0:
VlH Begirining of line
VIL Center of line
Logic "0" = VIL
Logic "I' = VIH
Divide select input = VIL, (VGG) for master clock
frequency of 1.26 MHz.
Divide select input = VIH. NSS) for master clock
frequency of 2.04545 MHz. _
INPUTS
The user may selecteither of two input clock frequencies
by properly programming the Divider Control pin. In
one case the input frequency is 2.04545 MHz, which is
14.31818 MHz divided by seven. The other is eighty
times the horizontal frequency, or 1.26 MHz. The
divider control will be programmed by connecting it to
VIH NSS) and VIL, NGG) respectively.
There are separate Vertical and Horizontal Reserinputs
which allow directly resetting the appropriate divider(s)
by a control pulse generated by external means. Both
horizontal and vertical dividers may be reset simultan-
typical performance characteristics
Typical '66 vs Temperature
CLOCK FREQUENCY * MH545 MHI
TA = 15'T
om = 235 m
Vss = 5V
Van I12V
lag (mAl
-5tt -t5 , " 50 " tim
AMBIENT TEMPERATURE f't)
eously by connecting the Vertical and Horizontal Reset
pins together and driving them with the same reset
signal. Actual resetting of the vertical divider is to
either of two states, depending 'upon the state of the
Vertical Reset Control input; to zero, or to the fifth
vertical serration pulse (eleven 0.5H time intervals from
leading edge of Vertical Blanking). Refer to the reset
table. The horizontal divider will always be reset to a
position which is 8 input clock pulses from the leading
edge of the serration gate in the horizontal timing
scheme (Figures 2 and 3). The generator is reset to the
odd field (field one). The Field Index output pulse
occurs once each odd field at the leading edge of Vertical
Blanking. It can be used to reset, or "gen-lock," similar
sync generator chips by connecting it to their Vertical
and Horizontal Reset inputs. The Horizontal Reset
Control selects Horizontal Reset to the start or center
of a line. For "gen-lock" both Horizontal and Vertical
Reset pulses should not exceed 800ns.
OUTPUTS
The generator supplies the following standard output
functions: Horizontal Drive Out, Vertical Drive Out,
Composite Blanking Out, Composite Sync Out and the
Color Burst Gate.
In addition, Field Index and Color Burst Sync outputs
are provided. The Field Index identifies the odd field,
or field one, by occurring for two clock periods at the
leading edge of Vertical Blinking in that field. Thus, its
rate is 30 Hz. As described above, it can also be used to
"gen-lock" other sync generator chips.
The Color Burst Sync output signal occurs at half the
horizontal rate with the same timing as the Color Burst
Gate output. it may be used to sync the color burst as
it will have the same delay characteristics as the other
outputs tincluding/ot course, the Color Burst Gate) -
the color burst sync is present during the vertical interval.
Differences in phasing between outputs are minimized
by the use of identical push-pull output buffers clocked
by the internal clock.
Typical '66 " Power Supply
Voltage Nss - Vccl
CLOCK FRED = Mm
TA = 25":
m " 235 m
Itss 3 5V
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'66 (MA)
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This datasheet has been :
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Datasheets for electronic components.
National Semiconductor was acquired by Texas Instruments.
corp/docs/irwestor_relations/Pr_09_23_201 1_national_semiconductor.html
This file is the datasheet for the following electronic components:
MM5321 N - product/mm5321n?HQS=TI-nuII-null-dscataIog-df-pf-null-wwe
