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12 hour format ..
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..
MM5316N ,Digital Alarm ClockElectrical Characteristics
TA within operating range, Vss = 21V to +29V, VDD = 0V, unless otherw ..
MM5316N ,Digital Alarm ClockGeneral Description
The MM5316 digital alarm clock is a monolithic MOS
integrated circuit utili ..
MM53200N ,Encoder/Decoder“mmmrmV T, T
MM53200
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National
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MN1A7T0200 ,MicrocomputerMN1A7T0200Type MN1A7T0200Max. 16 M in totalROM (× × × × ×8-bit / × × × × ×16-bit / × × × × ×32-bit) ..
MM53108N-MM5387
Digital Alarm Clocks
MM5387A3A; Manama
iltjp-.
_ T ._' Glacks
MM5387AA, MM53108. digital alarm clocks
general description
monolithic MOS integrated'circuits utilizing P-channe'l
low-threshold, enhancement mode and ioh-implanted
depletion'mode devices. They provide all the logic
required to build several types of clocks and timers
with up to four display modes (time; seconds, alarm
and sleep) to maximize circuit utility, but are specifi-
cally intended for clock-radio applications. Both devices
will directly-drive 7-setiment LED displays in either a
12 hour format (3% digits) with lead-zero bianking,
AM/PM indicatioh land flashing.colort, Gr 24 hour
format (4 digits) throogh hard-wire pin selection; the
timekeeping function operates from either a 50 cr
60 Hz input, also through pin selection. Outputs consist
of display drivers, sleep (e.g., timed radio turn-off), and
alarm enable. A power-fail indication mode is provided
to inform the user of incorrect time displawby flashing
all "dN" digits at a 1 Hz rate, and is cancelled W
simply resetting time. The device operates over a supply
range or24-2tN which does not require regulation.
"rhe MM5387AA, MM53108 digital alarm clocks are
features
50 or' 60 He operation
Single power supply
12 or 2'4 hour dWplay format
AM/PM outputs,
Leading-zero bienking
24-hour aiarrisetting
AII counters' are 'resettabIe
Fast and' slow set contrels
Power failure indication
Elimination of illegal time dishlev at turn "ON"
Direct interface to LEDdisplays
9-minute snooze alarm
Presettable 59-minute sleep timer
Available in standard (MM5387AA) or mirror image
(MM53108) pin-out
} V 12 hour format
The MM53108 is electrically identical to the applications"
MM5387AA, but with mirror-image pin-out to facilitate a Alarm clocks n Portable clocks
C2t'is"2'C,1tglt,','ii,i,maie a "modgle" It,',",' the II Desk clocks it Photography timers
Isp ay an c 1p are mounte on t e same a CI . . .
. . . . , T ock radios II lndu r al mer
side; the MM5387AA a more suited for "L ' shaped a A . n s.tri n. s
module designs (vertical LED display, horizontal com- _ utomobile clocks Applmnee timers
pqnent board). Both devices are supplied in a 40-lead n Stopwatches _ n Sequentualeontrollers
dual-in-Iine package. I! lndustrialclocks
block diagram
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FIGURE 1
1-62 _ _
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t, absolute maximum ratings .,,
'3? Voltage at Any Pin Except Segment Outputs vss + 0.3 to vss - 30V
. _ Voltage at Segment Outputs Vss + 0.3 t9 vss - 15V
Operating Temperature . -25''C to +70°C_
J Storage Temperature -65°C to +1stttr
Lead Temperature (Soldering, 10 seconds) 300°C
' electrical characteristics
_ TA within operating range,- Vss= 24V--26V, VDD= 0V unless otherwis'e specified.
PARAMETER I CONDITIONS MIN ' uTYP . MAX UNITS
Power Supply Voltage Outpui' Driving Display 2.4 _26" V
Functional Clock 8 26 V
Power Supply Current No Output Loads
vss = 8V F 4 mA
Vss = 26V 5 _ mA
. 50/60 Hz Input . .
Frequency Voltage vss = 8V to 26V aic Mor tit) 10k Hz
Logical High Level . . C' V Vgs-1 v33 Vss V
Logical Low Level V00 V00 VDD+2 . V
Input Leakage 100 PA
All Other Input Wiltages
Logical High Level V " _ [ Itss-i . , Vss vss v
Logical Low Level Internal Depletion Load to VDD VDD VDD Vss-6 V
Power Failure Detect Voltage (Vssyoltitge), (Note 2) 1 J I 75 I V
Couht Operating Voltage 8 2tr V _
Hold Count Voltage b (Note 2) 26 V
Output Current Levels Vss =' 24V to 26V,
Output Common = vst "
10's of Hours (b & c), 10's of Minutes , k
(a 8/d) '
Logical High Level, Source _ VOH =(uss .-. 4V 16 - - mA
Logical Low Level, Leakage VOL = I/SS - 14V _ a 10, PA .
1 Hz Display . I _ _ I
Logical High Level, Source VOH = Vss - 4 24 MA
Logical Low Level, Leakage _ VOL = V35 - 14 . IO PA
All Other Displays . ".
Logical High, Level, Source 'VQH = vss - 4V 8 (Note 1) mA
Logical Low Level, Leakage VOL L Vss"- 14V . 1,0 PA
Alarm and Steep Outputs vss = 24V
Logical High ' Source I/OH = I/SS - 2 500 _ PA
Logical Low, Sink VOL = vss - 2 1 _ pA
Note Tr Segment output current must be limited to 11 mA maximum by user; power dissipaho‘n must be limited to 900 an at 70°C ahd 1.2W
at 25° C. ,
Note 2: The power-fail detect voltage is 0.5V or more above the. hpid count voltage, The power-fail latch trips into power- -fail mode at least 0.6V
above the voltage at which data stored' In the time latch is lost.
' MM5387AA, MM53108
functional description _
A block diagram of the MM5387AA, MM53108 digital
clock radio circuit is shown in Figure f. The various
display setting modes are listed in Table l, and Table "
shows the setting control functions. The following"
description is based on Figure 1 and refers to both
devices as they are electrically identical.
50 or 60 Hz Input: A shaping circuit (Figure 3) is pro-
vided to square the' 50 or 60 Hz input.' This circuit
allows use of a filtered sinewave input. The circuit is a
Schmitt trigger that is .designed to provide about 6V or
hysteresis. A simple RC filter such as shewn in Figure 7,
should be used to remove possible linecvoltage trani
sients that could either cause the clock to gain time or
damage the device. The shaper output drives a counter
chain which performs the timekeeping function.
li0 or 60 He' Select Input: A programmable prescale
counter divides the input line frequency by either
50 or 60 to obtain a 1 Hz time base. This counter is
programmed to divide br 60 simply by leaving 50/
60 Hz select unconnected; pull-down to VDD is pro-
vided by an internal depletion load. Operation at 50 Hz
is programmed by-connecting 50/60 Hz select to vss.
Display Mode Select Inputs: In the absence of any of
these three inputs, the display drivers present time-of-
'day information to the appropriate display digits.
Internal depletion puII-down devices allow use of simple
SPST switches to select the display mode. if more than
one mode is selected, the priorities are as noted in
Table l. Alternate display modes are selected by apply-
ing Vss to the appropriate pin. As shown in Figure 1
the code converters receive time, seconds. alarm and
sleep information from appropriate points in the clock
circuitry. The display mode telect inputs control the
connection diagrams
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FIGURE 2(II. MM5387AA
gating of the desired data to the code eomierter inputs ,
and ultimately (via output drivers) to the display digits. ; T
Time Setting Inputs: Both -fast and slow setting inputs
are provided. These inputs are applied either singly or
in combination to obtain the control functions listed in
Table ll. Again, internal depletion pull-down devices
are provided; applicatibri of vet to these pins affects
the control functions. Note that the control functions
proper'are dependent on the selected display mode.
For example, a hold-time contra function is obtained
by selecting seconds display and actuatihg the slow set 7
. input.' As another example, the clock time may be resin
to 12:00:00 AM, by selecting seconds display and actu-
ating both slow and fast set inputs.
Output Common Source Connectiori: All display out-
put drivers' are open-drain devices 'with all sources
common (Figure 4a). The common source pin should.
be connected to vss.
12 or 24 Hour Select input: By leaving this pin uncon-
nected, the outputs for the most-significant display
digit (10's of hours) are programmed to provide a
12-hour display format. An internal depletion pull-
down device is again provided. Connectintrthis pin. to
vss programs the 24-hour display format. Segment
connections for 10's of Hours in 24-hour mode are
shown in Figures.
Power Fail indication: If the power to the integrated
circuit drops, indicating a momentary ac power failure
and possible loss of clock, all "ON" segments will
flash at 1 Hz rate. A fast or slow set input resets an
internal'power failure latch and returns the disblay to'
normal.
DuaI-In-Liqe Package
I _ Att '
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FIGURE 2H1). M3108 [Mirror Image Pin-Ou!)
, 1-64
functional deseriptfon (Continued)
Alarm Operation and Output: The alarm Comparator
(Figure 1) senses coincidence between the alarm count-
ers (the alarm setting) and the time counters (real time).
The comparator output is used to set a latch in the
alarm and sleep circuits. The latch output enables the"
alarm output driver (Figure 4ttl which is used to
control the external alarm sound generator. The alarm
latch remains-set for 59 minutes, during which the alarm
will therefore sbuhd if the latch output is not tempor-
arily inhibited by another latch set by the snooze alarm
input or reset by the alarm "OFF" input.
Snooze Alarm input: Momentarily connecting snooze
to Vss inhibits the alarm output for betweerr8 and 9 T .
minutes, after which the alarm will again be seunded.
This input is pulled-down to VDD by an internal deple-
tion device. The snooze alarm feature may be repeatedly
used during the 59 minutes in which the alarm latch
remains set.
Alarm "OFF" Input: Momentarily connecting alarm
"OFF" to Vss resets the alarm latch. and thereby
HIGH VT".
'? u” T
silences the alarm. This input is also returned to VDD by
an internal depletion device. The momentary alarm
"OFF" input also 'readies the alarm latch for the next
comparator output, and the alarm will automatically
sound again in 24 hours (or at a new alarm setting).
" it is desired to silence the alarm for a day or more,
the alarm."t3F.F" input should femaih at vss.
Sleep Timer and Output: The sleep output can be used
to turn "OFF" a radio after a desired time interval of up
to 69 minutes. The time interval is chosen by selecting
the sleep display mode, (Table " anAsetting the desired
time interval (Table II). This] automatically results in a
current-source output which can be usedfto turn "ON" a
radio (or other appliance). Ahlhen' the sleep counter,
which counts downwards, reaches 00 minutes, a latch
is .reset and the. sleep output current drive is removed,
thereby turning "OFF" the radio. This, turn "OFF"
may also be manually controlled (at any time in the
countdown) by a momentary Vss cimnection to the
Snooer input. The output circuitry is the same as the
othe/outputs (Figure 4b).
50180 Hr
OUTPUT
. Effectively
FIGURE 3. 50/60 Ha Input Shaping Circuit
00ml SOURCE BUS
. . yss
OUTPUT
(OPEN DRAIN)
FIGURE 4(a). Segment Outputs
ALARM on SLEEP
commence
OUTPUT .
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MM5387AA“; Mmsam
functional detcrimiojt "tkmtinued)
TABLE I. MM5387AA, msawa Display Modes
"stiecrED . _ , ' f
DISPLAY MODE DIGIT Nth 1 DIGIT NO. 2 T" NO. 3 DIBIT N0. A
Time, Display . . JO's of Hours & AM/PM Hours 10's of Minutes Minute: .
Seconds Display . BUnked I V Minutes. ' 10'iot Seconds Secbnds
Alarm _ Display 10's it Hours & AM/PM Hours t0's dt Minutes Minutes
Steep Display' . Blahked Blanked 10's of Minutes Minutes
*If more than one display mode input is applied, the display priorities are in the ader of Sleep (override:
all others), Alarm, Seconds, Time (no other mode selected).
OUTPUT CURRENT (BA)
TABLE II. MM6amuVMMS3108 Setting ttimtrot Functions
SELECTED . CONTROL
DISPLAY MODE INPUT cou‘rROL FUNCTION
*Time Slow Minutes Advance at 2 He Rate
Fast Minutes Advance at 60 He Rate
Both Minutes Advance at 60 ”Hz Rate
Alarm Slow Alarm Minutes Advance at 2 He Rate
Fast Alarm Minutes Advanqe at 60 Hz Rate
Both Alarm Resets to 12:00 AM (Midnight) (12-Hour Format)
' Both Alarm Resets to 00:00 (24er Format)
Seconds Slow mplst to Entire Time Counter. is inmtjitett (HoIdl
Fast " Seconds and 10's of Seconds Reset to Zero Without
"'.r a Carry to Minutes ., '
Both Time Resets 1012;00:00 AM (Midriight) [12-Hour Format)
Both " _ Time Resets to 00:00:00 (24-Houg Format)
Sleep said Subtract: Count at 2 Hz
Fast" I Subtracts Count at 60 Hz
Both _ Subtract: Count at 60 Hz
*Whan' setting time sleep minutes will decmheht arts“ of time qounter, until the sleep
counter reaches 00 minates (sleép counter will not recycle). . T
.dNH.M'N_-D
OUTPUT (DRAIN) VOLTABE BELOW Itts
FIGURE s. Typical Outpui Current
cmmwm of MM5387AA, M3108
IW-ZM I
" " I a c SLEEP
_ DISPLAY
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OUTPUT
COMMON
SOURCE
Switch A must be ganged with Sleep display as shown.
FIGURE 6. 24-Hour Operation:-
10's of Hours Dlglt Connection! '
1-66. '
typical applications
Figure 7 is a schematic diagram of a general purpose alarm clock circuit (12-hour mode) using the MM5387AA pr
MM53108 and a 3 1/2-digit LED display.
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FIGURE 7
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This file is the datasheet for the following electronic components:
MM53108N - product/mm53108n?HQS=T|-nu|I-null-dscatalog-df-pf-nuII-wwe
MM5387 - product/mm5387?HQS=T|-nu||-nu|I-dscatalog-df—pf-nulI-wwe