MC74VHCT541AMEL ,Octal Bus BufferELECTRICAL CHARACTERISTICS (Input t = t = 3.0ns)r fÎ T = 25°C T = – 40 to 85°CA AÎÎÎÎÎÎ MinÎÎÎ TypÎ ..
MC74VHCT573ADTRG , Octal D−Type Latch with 3−State Output
MC74VHCT573ADW ,Octal D-Type Latch with 3-State OutputELECTRICAL CHARACTERISTICS (Input t = t = 3.0ns)r fÎ T = 25°C T = – 40 to 85°CA AÎÎÎÎÎÎ MinÎÎÎ TypÎ ..
MC74VHCT573ADWR2 ,Octal D-Type Latch with 3-State OutputON SemiconductorOctal D-Type LatchMC74VHCT573Awith 3-State OutputThe MC74VHCT573A is an advanced h ..
MC74VHCT574ADTR2 ,Octal D-Type Flip-Flop with 3-State OutputELECTRICAL CHARACTERISTICS (Input t = t = 3.0ns)r fÎ T = 25°C T = – 40 to 85°CA AÎÎÎÎÎÎ MinÎÎÎ TypÎ ..
MC74VHCT74ADR2 ,Dual D-Type Flip-Flop with Set and Resetwhile maintaining CMOS low power dissipation.The signal level applied to the D input is transferred ..
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MDT10P22A3S , 8-bit micro-controller
MDT10P22A5P , 8-bit micro-controller
MDT10P23A1S , 8-bit micro-controller
MDT10P55B1P , 8-bit micro-controller
MDT10P55B1S , 8-bit micro-controller
MC74VHCT541ADTR2-MC74VHCT541ADW-MC74VHCT541AMEL
Octal Bus Buffer
Octal Bus Buffer
The MC74VHCT541A is an advanced high speed CMOS octal bus
buffer fabricated with silicon gate CMOS technology. It achieves high
speed operation similar to equivalent Bipolar Schottky TTL while
maintaining CMOS low power dissipation.
The MC74VHCT541A is a noninverting, 3–state, buffer/line
driver/line receiver. When either OE1 or OE2 is high, the terminal
outputs are in the high impedance state.
The VHCT inputs are compatible with TTL levels. This device can
be used as a level converter for interfacing 3.3V to 5.0V , because it has
full 5V CMOS level output swings.
The VHCT541A input and output (when disabled) structures
provide protection when voltages between 0V and 5.5V are applied,
regardless of the supply voltage. These input and output structures
help prevent device destruction caused by supply voltage –
input/output voltage mismatch, battery backup, hot insertion, etc. High Speed: tPD = 5.4ns (Typ) at VCC = 5V Low Power Dissipation: ICC = 4μA (Max) at TA = 25°C TTL–Compatible Inputs: VIL = 0.8V; VIH = 2.0V Power Down Protection Provided on Inputs and Outputs Balanced Propagation Delays Designed for 4.5V to 5.5V Operating Range Low Noise: VOLP = 1.6V (Max) Pin and Function Compatible with Other Standard Logic Families Latchup Performance Exceeds 300mA ESD Performance: HBM > 2000V; Machine Model > 200V Chip Complexity: 134 FETs or 33.5 Equivalent GatesY1A1Y2A2Y3A3Y4A4Y5A5Y6A6Y7A7Y8A8
OE1
OE2
OUTPUT
ENABLES
DATA
INPUTS
NONINVERTING
OUTPUTS
Figure 1. Logic Diagram Figure 2. Pin AssignmentOE1
GND
OE2
VCC
FUNCTION TABLE
