MC74VHCT32ADTR2 ,Quad 2-Input OR Gate / CMOS Logic Level Shifter with LSTTL-Compatible InputsMAXIMUM RATINGS*ÎÎÎÎÎÎ Symbol ParameterÎÎÎÎÎ ValueÎÎÎ UnitThis device contains protectioncircuitry ..
MC74VHCT373ADT ,Octal D-Type Latch with 3-State OutputMAXIMUM RATINGS*Symbol Parameter Value UnitThis device contains protectionÎÎÎcircuitry to guard aga ..
MC74VHCT373ADTR2 ,Octal Transparent Latch 3-StateON SemiconductorOctal D-Type LatchMC74VHCT373Awith 3-State OutputThe MC74VHCT373A is an advanced h ..
MC74VHCT373ADW ,Octal D-Type Latch with 3-State OutputELECTRICAL CHARACTERISTICSÎÎÎÎÎT = 25°C T = – 40 to 85°CA AÎÎV VCC CCVSb Symboll P Parameter T Test ..
MC74VHCT373AM ,Octal D-Type Latch with 3-State Output**SEMICONDUCTOR TECHNICAL DATA** * The MC74VHCT373A is an advanced high speed CMOS octal latch w ..
MC74VHCT373AMEL ,Octal D-Type Latch (TTL Compatible)**SEMICONDUCTOR TECHNICAL DATA** * The MC74VHCT373A is an advanced high speed CMOS octal latch w ..
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MC74VHCT32ADTR2
Quad 2-Input OR Gate / CMOS Logic Level Shifter with LSTTL-Compatible Inputs
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with LSTTL–Compatible InputsThe MC74VHCT32A is an advanced high speed CMOS 2–input
OR gate fabricated with silicon gate CMOS technology. It achieves
high speed operation similar to equivalent Bipolar Schottky TTL
while maintaining CMOS low power dissipation.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output.
The device input is compatible with TTL–type input thresholds and
the output has a full 5V CMOS level output swing. The input
protection circuitry on this device allows overvoltage tolerance on the
input, allowing the device to be used as a logic–level translator from
3.0V CMOS logic to 5.0V CMOS Logic or from 1.8V CMOS logic to
3.0V CMOS Logic while operating at the high–voltage power supply.
The MC74VHCT32A input structure provides protection when
voltages up to 7V are applied, regardless of the supply voltage. This
allows the MC74VHCT32A to be used to interface 5V circuits to 3V
circuits. The output structures also provide protection when VCC = 0V.
These input and output structures help prevent device destruction
caused by supply voltage – input/output voltage mismatch, battery
backup, hot insertion, etc. High Speed: tPD = 3.8ns (Typ) at VCC = 5V Low Power Dissipation: ICC = 2μA (Max) at TA = 25°C TTL–Compatible Inputs: VIL = 0.8V; VIH = 2.0V Power Down Protection Provided on Inputs Balanced Propagation Delays Designed for 2V to 5.5V Operating Range Low Noise: VOLP = 0.8V (Max) Pin and Function Compatible with Other Standard Logic Families Latchup Performance Exceeds 300mA ESD Performance: HBM > 2000V; Machine Model > 200VY1A1B1Y2A2B2Y3A3B3Y4A4B4
Y = AB
LOGIC DIAGRAM
