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MC74VHC240DTR2-MC74VHC240DWR2
Octal 3-State Driver
Octal Bus Buffer/Line Driver
Inverting with 3-State Outputs
The MC74VHC240 is an advanced high speed CMOS octal bus
buffer fabricated with silicon gate CMOS technology. It achieves high
speed operation similar to equivalent Bipolar Schottky TTL while
maintaining CMOS low power dissipation.
The MC74VHC240 is an inverting 3–state buffer, and has two
active–low output enables. This device is designed to drive bus lines
or buffer memory address registers.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7V, allowing the interface of 5V systems
to 3V systems. High Speed: tPD = 3.6ns (Typ) at VCC = 5V Low Power Dissipation: ICC = 4μA (Max) at TA = 25°C High Noise Immunity: VNIH = VNIL = 28% VCC Power Down Protection Provided on Inputs Balanced Propagation Delays Designed for 2V to 5.5V Operating Range Low Noise: VOLP = 0.9V (Max) Pin and Function Compatible with Other Standard Logic Families Latchup Performance Exceeds 300mA ESD Performance: HBM > 2000V; Machine Model > 200V Chip Complexity: 120 FETs or 30 Equivalent Gates
DATA
INPUTS YB4
YB3
YB2
YB1
YA4
YA3
YA2
YA1
INVERTING
OUTPUTS
OUTPUT
ENABLES
OEA
OEB
FUNCTION TABLEYB4
OEA
GND
YB1
YB2
YB3
YA2
YA1
OEB
VCC
YA4
YA3
Figure 1. PIN ASSIGNMENT
