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MC74VHC157DTR2
Data Selector/Multiplexer 2-Input
MC74VHC157
Quad 2-Channel Multiplexer
The MC74VHC157 is an advanced high–speed CMOS quad
2–channel multiplexer, fabricated with silicon gate CMOS
technology. It achieves high–speed operation similar to equivalent
Bipolar–Schottky TTL, while maintaining CMOS low–power
dissipation.
It consists of four 2–input digital multiplexers with common select
(S) and enable (E) inputs. When E is held High, selection of data is
inhibited and all the outputs go Low.
The select decoding determines whether the A or B inputs get routed
to the corresponding Y outputs.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7 V , allowing the interface of 5 V systems
to 3 V systems. High Speed: tPD = 4.1 ns (Typ) at VCC = 5 V Low Power Dissipation: ICC = 4 �A (Max) at TA = 25°C High Noise Immunity: VNIH = VNIL = 28% VCC Power Down Protection Provided on Inputs Balanced Propagation Delays Designed for 2 V to 5.5 V Operating Range Low Noise: VOLP = 0.8 V (Max) Pin and Function Compatible with Other Standard Logic Families Latchup Performance Exceeds 300 mA ESD Performance: HBM > 2000 V; Machine Model > 200 V Chip Complexity: 82 FETs
Figure 1. Pin AssignmentGND
VCC
