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MC74VHC139-MC74VHC139DTR2
Dual 2-to-4 Decoder/Demultiplexer
MC74VHC139
Dual 2-to-4 Decoder/
Demultiplexer
The MC74VHC139 is an advanced high speed CMOS 2–to–4
decoder/ demultiplexer fabricated with silicon gate CMOS
technology. It achieves high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining CMOS low power
dissipation.
When the device is enabled (E = low), it can be used for gating or as
a data input for demultiplexing operations. When the enable input is
held high, all four outputs are fixed high, independent of other inputs.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7V, allowing the interface of 5V systems
to 3V systems. High Speed: tPD = 5.0ns (Typ) at VCC = 5V Low Power Dissipation: ICC = 4μΑ (Max) at TA = 25°C High Noise Immunity: VNIH = VNIL = 28% VCC Power Down Protection Provided on Inputs Balanced Propagation Delays Designed for 2V to 5.5V Operating Range Low Noise: VOLP = 0.8 V (Max) Pin and Function Compatible with Other Standard Logic Families Latchup Performance Exceeds 300mA ESD Performance: HBM > 2000V; Machine Model > 200V Chip Complexity: 100 FETs or 25 Equivalent Gates
