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MC74VHC125-MC74VHC125DR2-MC74VHC125DTR2-MC74VHC125M
Quad Bus Buffer with 3-State Inputs
MC74VHC125
Quad Bus Buffer
with 3−State Control InputsThe MC74VHC125 is a high speed CMOS quad bus buffer
fabricated with silicon gate CMOS technology. It achieves high speed
operation similar to equivalent Bipolar Schottky TTL while
maintaining CMOS low power dissipation.
The MC74VHC125 requires the 3−state control input (OE) to be set
High to place the output into the high impedance state.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7 V, allowing the interface of 5 V
systems to 3 V systems. High Speed: tPD = 3.8ns (Typ) at VCC = 5 V Low Power Dissipation: ICC = 4 �A (Max) at TA = 25°C High Noise Immunity: VNIH = VNIL = 28% VCC Power Down Protection Provided on Inputs Balanced Propagation Delays Designed for 2 V to 5.5 V Operating Range Low Noise: VOLP = 0.8 V (Max) Pin and Function Compatible with Other Standard Logic Families Latchup Performance Exceeds 300 mA ESD Performance: Human Body Model; > 2000 V,
Machine Model; > 200 V Chip Complexity: 72 FETs or 18 Equivalent Gates
LOGIC DIAGRAM
Active−Low Output EnablesA1
OE1
OE2
OE3
OE4
FUNCTION TABLE
