MC74LVX245DWR2 ,Octal Bus TranceiverELECTRICAL CHARACTERISTICS (Input t = t = 3.0 ns)r fÎT = 25°C T = − 40 to 85°CA AÎÎSymbol Parameter ..
MC74LVX259D ,8-Bit Addressable Latch/1-of-8 Decoder CMOS Logic Level Shiftersilicon gate CMOS technology.MARKING DIAGRAMSThe internal circuit is composed of three stages, incl ..
MC74LVX32 ,Quad 2-Input OR GateELECTRICAL CHARACTERISTICS (Input t = t = 3.0ns)r fÎÎÎÎÎÎ T = 25°CÎÎÎÎÎÎ T = − 40 to 85°CÎÎÎA AÎÎÎÎ ..
MC74LVX32DR2 ,Quad 2-Input OR GateLogic DiagramORDERING INFORMATION†Device Package ShippingMC74LVX32DR2 SOIC−14 2500 Tape & ReelMC74L ..
MC74LVX32DR2 ,Quad 2-Input OR GateELECTRICAL CHARACTERISTICSÎÎT = 25°C T = − 40 to 85°CA AV VCC CCÎÎÎÎV Min Typ Max Min MaxSymbol Par ..
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MDC3105LT1 ,RELAY/SOLENOID DRIVER SILICON MONOLITHIC CIRCUIT BLOCKFeatures Low Input Drive CurrentCIRCUIT BLOCK• Internal Zener Clamp Routes Induced Current to Groun ..
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MDC3105LT1G ,Integrated Relay / Inductive Load Driver3MDC3105LT1TYPICAL PERFORMANCE CHARACTERISTICS(ON CHARACTERISTICS)500 5.0MC74HC04450 4.5T = 85°C@ 4 ..
MDC5001 ,Tech Electronics LTD - Low Voltage Bias Stabilizer with Enable
MDC5001T1 ,SILICON SMALLBLOCK INTEGRATED CIRCUITTHERMAL CHARACTERISTICSCharacteristic Symbol Max UnitTotal Device Power Dissipation P mWD(FR–5 PCB ..
MDC5001T1 ,SILICON SMALLBLOCK INTEGRATED CIRCUIT**Order this documentSEMICONDUCTOR TECHNICAL DATAby MDC5001T1/D * * ** • Maintains Stable Bias Cur ..
MC74LVX245DTR2-MC74LVX245DWR2
Octal Bus Tranceiver
MC74LVX245
Octal Bus Transceiver
With 5 V−Tolerant InputsThe MC74LVX245 is an advanced high speed CMOS octal bus
transceiver.
It is intended for two−way asynchronous communication between
data buses. The direction of data transmission is determined by the
level of the T/R input. The output enable pin (OE) can be used to
disable the device, so that the buses are effectively isolated.
All inputs are equipped with protection circuits against static
discharge. High Speed: tPD = 4.7 ns (Typ) at VCC = 3.3 V Low Power Dissipation: ICC = 4 �A (Max) at TA = 25°C Power Down Protection Provided on Inputs Balanced Propagation Delays Low Noise: VOLP = 0.8 V (Max) Pin and Function Compatible with Other Standard Logic Families Latchup Performance Exceeds 300 mA ESD Performance: Human Body Model > 2000 V;
Machine Model > 200 V Pb−Free Packages are Available*
APPLICATION NOTES Do not force a signal on an I/O pin when it is an active output,
damage may occur. All floating (high impedance) input or I/O pins must be fixed by
means of pullup or pulldown resistors or bus terminator ICs. A parasitic diode is formed between the bus and VCC terminals.
Therefore, the LVX245 cannot be used to interface 5 V to 3 V
systems directly.
Figure 1. 20−Lead Pinout (Top View)VCC B0 B1 B2 B3 B4 B5 B6 B7
T/R A0 A1 A2 A3 A4 A5 A6 A7 GND
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
SOIC−20
DW SUFFIX
CASE 751D = Assembly Location
WL, L = Wafer Lot
Y, YY = Year
W, WW = Work Week
TSSOP−20
DT SUFFIX
CASE 948E
http://
SOEIAJ−20
M SUFFIX
CASE 967See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
ORDERING INFORMATION
MARKING
DIAGRAMS
