MC74LCX652DWR2 ,No title found.**SEMICONDUCTOR TECHNICAL DATA*&-**&$**! * *$(*%)* #, (** !#)* ( * **(*%)* #, ( * *#*" *+*$ *%**$ ..
MC74LCX74 ,Low-Voltage CMOS Dual D-Type Flip-Flop**SEMICONDUCTOR TECHNICAL DATA**!** * * ** "** * * * **The MC74LCX74 is a high performance, dual ..
MC74LCX74DR2 ,Low-Voltage CMOS Dual D-Type Flip-FlopLogic DiagramPIN NAMESPins FunctionCP1, CP2 Clock Pulse InputsD1−D2 Data InputsCD1, CD2 Direct Clea ..
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MC74LCX652DWR2
No title found.
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The MC74LCX652 is a high performance, non–inverting octal
transceiver/registered transceiver operating from a 2.7 to 3.6V supply.
High impedance TTL compatible inputs significantly reduce current
loading to input drivers while TTL compatible outputs offer improved
switching noise performance. A VI specification of 5.5V allows
MC74LCX652 inputs to be safely driven from 5V devices. The
MC74LCX652 is suitable for memory address driving and all TTL level
bus oriented transceiver applications.
Data on the A or B bus will be clocked into the registers as the
appropriate clock pin goes from a LOW–to–HIGH logic level. Two Output
Enable pins (OEBA, OEAB) are provided to control the transceiver
outputs. In the transceiver mode, data present at the high impedance port
may be stored in either the A or the B register or in both. The select
controls (SBA, SAB) can multiplex stored and real–time (transparent
mode) data. In the isolation mode (both outputs disabled), A data may be
stored in the B register or B data may be stored in the A register. When in
the real–time mode, it is possible to store data without using the internal
registers by simultaneously enabling OEAB and OEBA. In this
configuration, each output reinforces its input (data retention is not
guaranteed in this mode). Designed for 2.7 to 3.6V VCC Operation 5V T olerant — Interface Capability With 5V TTL Logic Supports Live Insertion and Withdrawal IOFF Specification Guarantees High Impedance When VCC = 0V LVTTL Compatible LVCMOS Compatible 24mA Balanced Output Sink and Source Capability Near Zero Static Supply Current in All Three Logic States (10μA)
Substantially Reduces System Power Requirements Latchup Performance Exceeds 500mA ESD Performance: Human Body Model >2000V; Machine Model >200V
VCC
CBA SBA OEBA B0 B1 B2 B3 B4 B5
CAB SAB OEAB A0 A1 A2 A3 A4 A5 A6 B7 GND
PIN NAMES