MC74LCX16240DTR2 ,Low-Voltage CMOS 16-Bit BufferFeatures• Designed for 2.3 to 3.6 V V OperationCC 1• 5.0 V Tolerant − Interface Capability With 5.0 ..
MC74LCX16244 ,Low-Voltage CMOS 16-Bit BufferFeatures1• Designed for 2.3 V to 3.6 V V OperationCC• 4.5 ns Maximum tpd• 5.0 V Tolerant − Interfac ..
MC74LCX16244 ,Low-Voltage CMOS 16-Bit Buffer
MC74LCX16244 ,Low-Voltage CMOS 16-Bit Buffer
MC74LCX16244D ,Low-Voltage CMOS 16-Bit Buffer With 5 V-Tolerant Inputs and Outputs (3-State, Non-Inverting)The MC74LCX16244 is a high performance, non–inverting 16–bitbuffer operating from a 2.3 to 3.6 V su ..
MC74LCX16244DT ,Low-Voltage CMOS 16-Bit BufferThe MC74LCX16244 is a high performance, non−inverting 16−bitbuffer operating from a 2.3 to 3.6 V su ..
MD8282 , OCTAL LATCH
MD8286 , OCTAL BUS TRANSCEIVER
MD8287 , OCTAL BUS TRANSCEIVER
MD8288 , M8288 BUS CONTROLLER FOR M8066,M8088,M80186 PROCESSORS
MD8288 , M8288 BUS CONTROLLER FOR M8066,M8088,M80186 PROCESSORS
MD82C37A-12/B ,CMOS High Performance Programmable DMA ControllerFeatures Description• Compatible with the NMOS 8237A The 82C37A is an enhanced version of the indus ..
MC74LCX16240DTR2
Low-Voltage CMOS 16-Bit Buffer
MC74LCX16240
Low-Voltage CMOS
16-Bit Buffer
With 5 V−Tolerant Inputs and Outputs
(3−State, Inverting)The MC74LCX16240 is a high performance, inverting
16−bit buffer operating from a 2.3 V to 3.6 V supply. The device is
nibble controlled. Each nibble has separate Output Enable inputs
which can be tied together for full 16−bit operation. High impedance
TTL compatible inputs significantly reduce current loading to input
drivers while TTL compatible outputs offer improved switching noise
performance. A VI specification of 5.5 V allows MC74LCX16240
inputs to be safely driven from 5.0 V devices. The LCX16240 is
suitable for memory address driving and all TTL level bus oriented
transceiver applications.
Current drive capability is 24 mA at the outputs. The Output Enable
(OEn) inputs, when HIGH, disable the outputs by placing them in a
HIGH Z condition.
The MC74LCX16240 contains sixteen inverting buffers with
3−state 5.0 V tolerant outputs. The device is nibble controlled with
each nibble functioning identically, but independently. The control
pins may be tied together to obtain full 16−bit operation. The 3−state
outputs are controlled by an Output Enable (OEn) input for each
nibble. When OEn is LOW, the outputs are on. When OEn is HIGH,
the outputs are in the high impedance state.
Features Designed for 2.3 to 3.6 V VCC Operation 5.0 V Tolerant − Interface Capability With 5.0 V TTL Logic Supports Live Insertion and Withdrawal IOFF Specification Guarantees High Impedance When VCC = 0 V LVTTL Compatible LVCMOS Compatible 24 mA Balanced Output Sink and Source Capability Near Zero Static Supply Current in All Three Logic States (10 �A)
Substantially Reduces System Power Requirements Latchup Performance Exceeds 500 mA ESD Performance: Human Body Model >2000 V;
Machine Model >200 V All Devices in Package TSSOP are Inherently Pb−Free*
*For additional information on our Pb−Free strategy and soldering details, please
