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MC74LCX125MMOTON/a1500avaiLOW-VOLTAGE CMOS QUAD BUFFER


MC74LCX125M ,LOW-VOLTAGE CMOS QUAD BUFFER**SEMICONDUCTOR TECHNICAL DATA*$+**$"( * *)*)&*!( $"*&*#( * *#%)(’ *#* *)(%)(’*(*(** *$#**#**&(!#* ..
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MC74LCX125M
LOW-VOLTAGE CMOS QUAD BUFFER
SEMICONDUCTOR TECHNICAL DATA
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The MC74LCX125 is a high performance, non–inverting quad buffer
operating from a 2.7 to 3.6V supply. High impedance TTL compatible
inputs significantly reduce current loading to input drivers while TTL
compatible outputs offer improved switching noise performance. A VI
specification of 5.5V allows MC74LCX125 inputs to be safely driven from
5V devices. The MC74LCX125 is suitable for memory address driving
and all TTL level bus oriented transceiver applications.
Current drive capability is 24mA at the outputs. The Output Enable
(OEn) inputs, when HIGH, disable the outputs by placing them in a HIGH
Z condition. Designed for 2.7 to 3.6V VCC Operation 5V T olerant — Interface Capability With 5V TTL Logic Supports Live Insertion and Withdrawal IOFF Specification Guarantees High Impedance When VCC = 0V LVTTL Compatible LVCMOS Compatible 24mA Balanced Output Sink and Source Capability Near Zero Static Supply Current in All Three Logic States (10μA)
Substantially Reduces System Power Requirements Latchup Performance Exceeds 500mA ESD Performance: Human Body Model >2000V; Machine Model >200V
Pinout: 14–Lead (Top View)

VCC OE3D3 O3 OE2D2 O2
OE0D0 O0 OE1 D1 O1 GND O0
OE0 1 O1
OE1 4 O2
OE2 10 O3
OE3 13
LOGIC DIAGRAM
PIN NAMES

H = High Voltage Level; L = Low Voltage Level; Z = High Imped-
ance State; X = High or Low Voltage Level and Transitions Are
Acceptable, for ICC reasons, DO NOT FLOAT Inputs
FUNCTION TABLE
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