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MC74HCT138AN
1-of-8 Decoder/Demultiplexer with LSTTL Compatible Inputs
SEMICONDUCTOR TECHNICAL DATA!$# &!
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High–Performance Silicon–Gate CMOSThe MC74HCT138A is identical in pinout to the LS138. The HCT138A
may be used as a level converter for interfacing TTL or NMOS outputs to
High Speed CMOS inputs.
The HCT138A decodes a three–bit Address to one–of–eight active–lot
outputs. This device features three Chip Select inputs, two active–low and
one active–high to facilitate the demultiplexing, cascading, and chip–select-
ing functions. The demultiplexing function is accomplished by using the
Address inputs to select the desired device output; one of the Chip Selects is
used as a data input while the other Chip Selects are held in their active
states. Output Drive Capability: 10 LSTTL Loads TTL/NMOS Compatible Input Levels Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 4.5 to 5.5 V Low Input Current: 1.0 μA In Compliance with the Requirements Defined by JEDEC Standard
No. 7A Chip Complexity: 122 FETs or 30.5 Equivalent Gates
LOGIC DIAGRAMCS1
CS2
ACTIVE–LOW
OUTPUTS
ADDRESS
INPUTS
CS3
CHIP–
SELECT
INPUTS 5
PIN 16 = VCC
PIN 8 = GND
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FUNCTION TABLEH = high level (steady state)
L = low level (steady state)
