MC74HC573ADT ,Octal 3-State NonInverting Transparent LatchMaximum ratingsÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎapplied to the device are individua ..
MC74HC573ADT ,Octal 3-State NonInverting Transparent LatchMaximum ratings are those values beyond which device damage can occur.
MC74HC573ADW ,Octal 3-State NonInverting Transparent Latchhttp://onsemi.comare compatible with standard CMOS outputs; with pullup resistors,they are compatib ..
MC74HC573ADWG , Octal 3−State Noninverting Transparent Latch High−Performance Silicon−Gate CMOS
MC74HC573ADWG , Octal 3−State Noninverting Transparent Latch High−Performance Silicon−Gate CMOS
MC74HC573ADWR2 ,Octal 3-State NonInverting Transparent LatchMaximum ratingsÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎapplied to the device are individua ..
MD54-0003TR ,MMIC Medium Level Mixer 1700
MD54-0003TR ,MMIC Medium Level Mixer 1700
MD54-0004TR ,800-1000 MHz, MMIC medium level mixer
MD54-0004TR ,800-1000 MHz, MMIC medium level mixer
MD54-0004TR ,800-1000 MHz, MMIC medium level mixer
MD54-0007TR ,Low Cost MMIC Mixer, 2.1
MC74HC573A-MC74HC573ADT-MC74HC573ADW-MC74HC573ADWR2-MC74HC573AFEL-MC74HC573AN
Octal 3-State NonInverting Transparent Latch
MC74HC573A
Octal 3-State Noninverting
Transparent Latch
High−Performance Silicon−Gate CMOSThe MC74HC573A is identical in pinout to the LS573. The devices
are compatible with standard CMOS outputs; with pullup resistors,
they are compatible with LSTTL outputs.
These latches appear transparent to data (i.e., the outputs change
asynchronously) when Latch Enable is high. When Latch Enable goes
low, data meeting the setup and hold time becomes latched.
The HC573A is identical in function to the HC373A but has the data
inputs on the opposite side of the package from the outputs to facilitate
PC board layout.
Features Pb−Free Packages are Available* Output Drive Capability: 15 LSTTL Loads Outputs Directly Interface to CMOS, NMOS and TTL Operating Voltage Range: 2.0 to 6.0 V Low Input Current: 1.0 �A In Compliance with the JEDEC Standard No. 7.0 A Requirements Chip Complexity: 218 FETs or 54.5 Equivalent Gates
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
MARKING
DIAGRAMS = Assembly Location = Wafer Lot = Year = Work Week
SOIC WIDE−20
DW SUFFIX
CASE 751D
PDIP−20
N SUFFIX
CASE 738
TSSOP−20
DT SUFFIX
CASE 948ESee detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
ORDERING INFORMATION
http://
