MC74HC540 ,Octal 3-State Inverting Buffer/Line Driver/Line ReceiverLOGIC DIAGRAM InputsOutput YOE1 OE2 A2 18A1 Y1 L L L HL L H L3 17A2 Y2 H X X ZX H X Z4 16A3 Y3Z = H ..
MC74HC540A ,Octal 3-State Inverter Buffer/Line Driver/Line Receiverhttp://onsemi.cominputs are compatible with Standard CMOS outputs. External pull–upresistors make t ..
MC74HC540A ,Octal 3-State Inverter Buffer/Line Driver/Line Receiverhttp://onsemi.com2MC74HC540A
MC74HC540ADTR2 ,Octal 3-State Inverter Buffer/Line Driver/Line Receiverhttp://onsemi.com3MC74HC540ADC CHARACTERISTICS (Voltages Referenced to GND)Guaranteed LimitV VCC CC ..
MC74HC540ADWR2 ,Octal 3-State Inverter Buffer/Line Driver/Line ReceiverMAXIMUM RATINGS (Note 1.)Symbol Parameter Value UnitV DC Supply Voltage 0.5 to 7.0 VCCV DC Input ..
MC74HC540ADWR2 ,Octal 3-State Inverter Buffer/Line Driver/Line Receiverfeatures inputsand outputs on opposite sides of the package and two ANDed20MC74HC540ANactive–low ou ..
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MC74HC540
Octal 3-State Inverting Buffer/Line Driver/Line Receiver
SEMICONDUCTOR TECHNICAL DATA -
High–Performance Silicon–Gate CMOSThe MC74HC540A is identical in pinout to the LS540. The device inputs
are compatible with Standard CMOS outputs. External pullup resistors make
them compatible with LSTTL outputs.
The HC540A is an octal inverting buffer/line driver/line receiver designed
to be used with 3–state memory address drivers, clock drivers, and other
bus–oriented systems. This device features inputs and outputs on opposite
sides of the package and two ANDed active–low output enables.
The HC540A is similar in function to the HC541A, which has non–inverting
outputs. Output Drive Capability: 15 LSTTL Loads Outputs Directly Interface to CMOS, NMOS and TTL Operating Voltage Range: 2 to 6V Low Input Current: 1μA High Noise Immunity Characteristic of CMOS Devices In Compliance With the JEDEC Standard No. 7A Requirements Chip Complexity: 124 FETs or 31 Equivalent GatesY1A1Y2A2Y3A3Y4A4Y5A5Y6A6Y7A7Y8A8
OE1
OE2
Output
Enables
Data
Inputs
Inverting
Outputs
PIN 20 = VCC
PIN 10 = GND
LOGIC DIAGRAM
Pinout: 20–Lead Packages (Top View)VCC
OE2 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8
