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MC74HC4020AN
14-Stage Binary Ripple Counter
SEMICONDUCTOR TECHNICAL DATA -
High–Performance Silicon–Gate CMOSThe MC74C4020A is identical in pinout to the standard CMOS
MC14020B. The device inputs are compatible with standard CMOS outputs;
with pullup resistors, they are compatible with LSTTL outputs.
This device consists of 14 master–slave flip–flops with 12 stages brought
out to pins. The output of each flip–flop feeds the next and the frequency at
each output is half of that of the preceding one. Reset is asynchronous and
active–high.
State changes of the Q outputs do not occur simultaneously because of
internal ripple delays. Therefore, decoded output signals are subject to
decoding spikes and may have to be gated with the Clock of the HC4020A
for some designs. Output Drive Capability: 10 LSTTL Loads Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 2 to 6 V Low Input Current: 1 μA High Noise Immunity Characteristic of CMOS Devices In Compliance With JEDEC Standard No. 7A Requirements Chip Complexity: 398 FETs or 99.5 Equivalent Gates
LOGIC DIAGRAM975461312
Q1014
Q1115
Q121
Q132
Q143
Clock 10
Reset
Pin 8 = GND
VCC
Q11 Q10 Q8 Q9 Reset Clock Q1
Q12 Q13 Q14 Q6 Q5 Q7 Q4 GND
FUNCTION TABLE
