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MC74HC393ADR2-MC74HC393AFEL-MC74HC393AN
Dual 4-Stage Binary Ripple Counter
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High–Performance Silicon–Gate CMOSThe MC74HC393A is identical in pinout to the LS393. The device
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LSTTL outputs.
This device consists of two independent 4–bit binary ripple counters
with parallel outputs from each counter stage. A ÷ 256 counter can be
obtained by cascading the two binary counters.
Internal flip–flops are triggered by high–to–low transitions of the
clock input. Reset for the counters is asynchronous and active–high.
State changes of the Q outputs do not occur simultaneously because of
internal ripple delays. Therefore, decoded output signals are subject to
decoding spikes and should not be used as clocks or as strobes except
when gated with the Clock of the HC393A. Output Drive Capability: 10 LSTTL Loads Outputs Directly Interface to CMOS, NMOS, and TTL Operating V oltage Range: 2 to 6 V Low Input Current: 1 μA High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC Standard
No. 7A Chip Complexity: 236 FETs or 59 Equivalent Gates
LOGIC DIAGRAMCLOCK
RESET
1, 13
PIN 14 = VCC
PIN 7 = GND
FUNCTION TABLE
