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MC74HC368N
Hex 3-State Inverting Buffer with Separate 2-Bit and 4-Bit Sections
SEMICONDUCTOR TECHNICAL DATA!! #! "
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High–Performance Silicon–Gate CMOSThe MC74HC368 is identical in pinout to the LS368. The device inputs are
compatible with standard CMOS outputs; with pullup resistors, they are
compatible with LSTTL outputs.
This device is arranged into 2–bit and 4–bit sections, each having its own
active–low Output Enable. When either of the enables is high, the affected
buffer outputs are placed into high–impedance states. The HC368 has
inverting outputs. Output Drive Capability: 15 LSTTL Loads Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 2 to 6 V Low Input Current: 1 μA High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC Standard
No. 7A Chip Complexity: 80 FETs or 20 Equivalent Gates
LOGIC DIAGRAMOUTPUT ENABLE 1
OUTPUT ENABLE 2
PIN 8 = GND
