MC74HC280N ,9-Bit Odd/Even Parity Generator/CheckerMAXIMUM RATINGS*ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ..
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MC74HC280N
9-Bit Odd/Even Parity Generator/Checker
SEMICONDUCTOR TECHNICAL DATA! "
High–Performance Silicon–Gate CMOSThe MC74HC280 is identical in pinout to the LS280. The device inputs are
compatible with standard CMOS outputs; with pullup resistors, they are
compatible with LSTTL outputs.
This circuit consists of 9 data–bit inputs (A through I) and 2 outputs (Even
Parity and Odd Parity) to allow both odd and even parity applications. Words
greater than 9–bits can be accommodated by cascading other HC280
devices.
This device can be used in systems utilizing the LS180 parity generator/
checker. Although the HC280 does not have expander inputs, the
corresponding function is provided by an input at pin 4 and the absence of
any connection at pin 3. This permits the HC280 to be substituted for the
LS180 to produce a similar function, even if the HC280s are mixed with
existing LS180s. NOTE: Pullup resistors must be used on the LS180 outputs
to interface with the HC280. Output Drive Capability: 10 LSTTL Loads Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 2 to 6 V Low Input Current: 1 μA High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC Standard
No. 7A Chip Complexity: 226 FETs or 56.5 Equivalent Gates
FUNCTION TABLE
LOGIC DIAGRAMEVEN PARITY
ODD PARITY
PARITY
OUTPUTS
9–BIT
DATA–
WORD
INPUTS
VCC = PIN 14
GND = PIN 7
NO CONNECTION = PIN 3
