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MC74HC237N
1-of-8 Decoder/Demultiplexer with Address Latch
SEMICONDUCTOR TECHNICAL DATA! #
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High–Performance Silicon–Gate CMOSThe MC74HC237 is identical in pinout to the LS137, but has noninverting
outputs. The device inputs are compatible with standard CMOS outputs; with
pullup resistors, they are compatible with LSTTL outputs.
The HC237 decodes a three–bit Address to one–of–eight active–high
outputs. The device has a transparent latch for storage of the Address. Two
Chip Selects, one active–low and one active–high, are provided to facilitate
the demultiplexing, cascading, and chip–selecting functions.
The demultiplexing function is accomplished by using the Address inputs
to select the desired device output, and then by using one of the Chip
Selects as a data input while holding the other one active.
The HC237 is the noninverting version of the HC137. Output Drive Capability: 10 LSTTL Loads Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 2 to 6 V Low Input Current: 1 μA High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC Standard
No 7A Chip Complexity: 156 FETs or 39 Equivalent Gates
LOGIC DIAGRAMADDRESS
INPUTS
LATCH
ENABLE
CHIP-
SELECT
INPUTS
CS1
CS2
ACTIVE–
HIGH
OUTPUTS
FUNCTION TABLE = Depends upon the Address previously applied while LE was
