MC74HC174AF-MC74HC174AFEL-MC74HC174AFL1-MC74HC174AFR2 Fast Delivery |IC PHOENIX CO.,LIMITED

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Partno	Mfg	Dc	Qty	Available	Descript
MC74HC174AF	MOT	N/a	1167	avai	Hex D Flip-Flop with Common Clock and Reset
MC74HC174AFEL	MOT	N/a	2000	avai	Hex D Flip-Flop with Common Clock and Reset
MC74HC174AFL1	MOT	N/a	61	avai	Hex D Flip-Flop with Common Clock and Reset
MC74HC174AFR2	MOT	N/a	220	avai	Hex D Flip-Flop with Common Clock and Reset

MC74HC174AFEL ,Hex D Flip-Flop with Common Clock and ResetMaximum Ratings are those values beyond which damage to the device may occur.Functional operation s ..
MC74HC174AFL1 ,Hex D Flip-Flop with Common Clock and Resetresistors, they are compatible with LSTTL outputs.This device consists of six D flip–flops with com ..
MC74HC174AFR2 ,Hex D Flip-Flop with Common Clock and ResetELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)ÎÎÎGuaranteed LimitÎÎÎ VÎÎÎÎÎÎ – 55 toÎÎÎÎÎÎ ..
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MC74HC175 ,Quad D Flip-Flop with Common Clock and ResetMaximum Ratings are those values beyond which damage to the device may occur.ÎÎÎÎÎFunctional operat ..
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MC74HC174AF-MC74HC174AFEL-MC74HC174AFL1-MC74HC174AFR2
Hex D Flip-Flop with Common Clock and Reset
------High–Performance Silicon–Gate CMOS
The MC74HC174A is identical in pinout to the LS174. The device
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LSTTL outputs.
This device consists of six D flip–flops with common Clock and
Reset inputs. Each flip–flop is loaded with a low–to–high transition of
the Clock input. Reset is asynchronous and active–low. Output Drive Capability: 10 LSTTL Loads TTL NMOS Compatible Input Levels Outputs Directly Interface to CMOS, NMOS, and TTL Operating V oltage Range: 4.5 to 5.5 V Low Input Current: 1.0 μA In Compliance with the Requirements Defined by JEDEC Standard
No. 7A Chip Complexity: 162 FETs or 40.5 Equivalent Gates
LOGIC DIAGRAM
PIN 16 = VCC
PIN 8 = GND
CLOCK9
RESET
DATA
INPUTS
NONINVERTING
OUTPUTS
FUNCTION TABLE
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*Equivalent to a two–input NAND gate.

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