MC74HC165AFL1 ,8-Bit Serial or Parallel-Input/Serial-Output Shift RegisterELECTRICAL CHARACTERISTICS (C = 50 pF, Input t = t = 6 ns)L r fÎÎGuaranteed LimitÎÎÎÎÎÎV – 55 toCCÎ ..
MC74HC165AN ,8-Bit Serial or Parallel-Input/Serial-Output Shift Register
MC74HC165AN ,8-Bit Serial or Parallel-Input/Serial-Output Shift Register
MC74HC165N ,8-Bit Serial or Parallel-Input/Serial-Output Shift RegisterMAXIMUM RATINGS*ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ..
MC74HC173N ,Quad 3-State D Flip-Flop with Common Clock and ResetMAXIMUM RATINGS*ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ..
MC74HC174A ,Hex D-Type Flip-Flop with ClockLogic DiagramDESIGN/VALUE TABLEDesign Criteria Value UnitsÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎInternal Gate Count* 40 ..
MCT271 ,3 V, 60 mA phototransistor optocouplerElectrical CharacteristicsT = 25 °C, unless otherwise specifiedambMinimum and maximum values are te ..
MCT272 ,Optocoupler, Phototransistor Output, With Base ConnectionRev. 1.4, 19-Apr-04 3MCT270/ 1/ 2/ 3/ 4/ 5/ 6/ 7VISHAYVishay SemiconductorsSwitching Characteristic ..
MCT275 ,3 V, 60 mA phototransistor optocouplerRev. 1.4, 19-Apr-04 3MCT270/ 1/ 2/ 3/ 4/ 5/ 6/ 7VISHAYVishay SemiconductorsSwitching Characteristic ..
MCT276 ,3 V, 60 mA phototransistor optocouplerabsolute Maximum Ratings can cause permanent damage to the device. Functional operation of the devi ..
MCT277 ,Optocoupler, Phototransistor Output, With Base ConnectionElectrical CharacteristicsT = 25 °C, unless otherwise specifiedambMinimum and maximum values are te ..
MCT277 ,Optocoupler, Phototransistor Output, With Base Connection Document Number 837244 Rev. 1.4, 19-Apr-04NCTR - Normlized CTR V - Forward Voltage - VFNCTR - Norm ..
MC74HC165ADT-MC74HC165AFL1
8-Bit Serial or Parallel-Input/Serial-Output Shift Register
-! !
High–Performance Silicon–Gate CMOSThe MC74HC165A is identical in pinout to the LS165. The device
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LSTTL outputs.
This device is an 8–bit shift register with complementary outputs
from the last stage. Data may be loaded into the register either in
parallel or in serial form. When the Serial Shift/Parallel Load input is
low, the data is loaded asynchronously in parallel. When the Serial
Shift/Parallel Load input is high, the data is loaded serially on the
rising edge of either Clock or Clock Inhibit (see the Function Table).
The 2–input NOR clock may be used either by combining two
independent clock sources or by designating one of the clock inputs to
act as a clock inhibit. Output Drive Capability: 10 LSTTL Loads Outputs Directly Interface to CMOS, NMOS, and TTL Operating V oltage Range: 2 to 6 V Low Input Current: 1 μA High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC Standard
No. 7A Chip Complexity: 286 FETs or 71.5 Equivalent Gates
