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MC74HC133NMOTOROLAN/a14avai13-Input NAND Gate
MC74HC133NMOTN/a25avai13-Input NAND Gate


MC74HC133N ,13-Input NAND GateELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ..
MC74HC133N ,13-Input NAND GateMAXIMUM RATINGS*ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ..
MC74HC137N ,1-of-8 Decoder/Demultiplexer with Address LatchELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ..
MC74HC137N ,1-of-8 Decoder/Demultiplexer with Address LatchMAXIMUM RATINGS*ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ..
MC74HC138A ,1-of-8 Decoder/DemultiplexerLOGIC DIAGRAMA = Assembly Location115A0 Y0WL = Wafer LotADDRESS 142Y1 YY = YearA1INPUTS13WW = Work ..
MC74HC138AD ,1-of-8 Decoder/Demultiplexer* High–Performance Silicon–Gate CMOSThe MC74HC138A is identical in pinout to the LS138. The devicei ..
MCR68-2 ,Silicon Controlled RectifiersMAXIMUM RATINGS (T = 25°C unless otherwise noted)JRating Symbol Value Unit(1)Peak Repetitive Off–St ..
MCR68-2 ,Silicon Controlled RectifiersELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted.)CCharacteristic Symbol Min Typ Max Uni ..
MCR69-2 ,Silicon Controlled RectifiersMaximum ratings applied to the device are individual stress limit values (notORDERING INFORMATIONno ..
MCR69-2 ,Silicon Controlled RectifiersMAXIMUM RATINGS (T = 25°C unless otherwise noted)JRating Symbol Value UnitMARKINGPeak Repetitive Of ..
MCR69-3 ,Silicon Controlled RectifiersELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted.)CCharacteristic Symbol Min Typ Max Uni ..
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MC74HC133N
13-Input NAND Gate
SEMICONDUCTOR TECHNICAL DATA -
High–Performance Silicon–Gate CMOS

The MC74HC133 is identical in pinout to the LS133. The device inputs are
compatible with standard CMOS outputs; with pullup resistors, they are
compatible with LSTTL outputs.
This NAND gate features 13 inputs which surpasses most random logic
requirements. Output Drive Capability: 10 LSTTL Loads Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 2 to 6 V Low Input Current: 1 μA High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC Standard
No. 7A Chip Complexity: 68 FETs or 17 Equivalent Gates
LOGIC DIAGRAM
Y
PIN 16 = VCC
PIN 8 = GND
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