MC74HC132ADR2 ,Quad 2 Input NAND Gate with Schmitt TriggerMC74HC132AQuad 2-Input NAND Gatewith Schmitt-Trigger InputsHigh−Performance Silicon−Gate CMOSThe MC ..
MC74HC132ADR2G , Quad 2−Input NAND Gate with Schmitt−Trigger Inputs High−Performance Silicon−Gate CMOS
MC74HC132ADTR2 ,Quad 2 Input NAND Gate with Schmitt Triggerinputs are compatible with standard CMOS outputs; with pull−upresistors, they are compatible with L ..
MC74HC132AF ,Quad 2-Input NAND Gate With Schmitt-Trigger InputsELECTRICAL CHARACTERISTICS (C = 50 pF, Input t = t = 6.0 ns)L r fÎÎGuaranteed LimitÎÎÎÎÎÎV – 55 toC ..
MC74HC132AFL1 ,Quad 2-Input NAND Gate With Schmitt-Trigger InputsMAXIMUM RATINGS*Symbol Parameter Value UnitThis device contains protectioncircuitry to guard agains ..
MC74HC132AN ,Quad 2 Input NAND Gate with Schmitt TriggerMaximum ratings applied to the device are individual stress limitvalues (not normal operating condi ..
MCR68-2 ,Silicon Controlled RectifiersMAXIMUM RATINGS (T = 25°C unless otherwise noted)JRating Symbol Value Unit(1)Peak Repetitive Off–St ..
MCR68-2 ,Silicon Controlled RectifiersELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted.)CCharacteristic Symbol Min Typ Max Uni ..
MCR69-2 ,Silicon Controlled RectifiersMaximum ratings applied to the device are individual stress limit values (notORDERING INFORMATIONno ..
MCR69-2 ,Silicon Controlled RectifiersMAXIMUM RATINGS (T = 25°C unless otherwise noted)JRating Symbol Value UnitMARKINGPeak Repetitive Of ..
MCR69-3 ,Silicon Controlled RectifiersELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted.)CCharacteristic Symbol Min Typ Max Uni ..
MCR703A ,Silicon Controlled RectifiersELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)CCharacteristic Symbol Min Typ Max Unit ..
MC74HC132A-MC74HC132AD-MC74HC132ADR2-MC74HC132ADTR2-MC74HC132AN
Quad 2 Input NAND Gate with Schmitt Trigger
MC74HC132A
Quad 2-Input NAND Gate
with Schmitt-T rigger Inputs
High−Performance Silicon−Gate CMOSThe MC74HC132A is identical in pinout to the LS132. The device
inputs are compatible with standard CMOS outputs; with pull−up
resistors, they are compatible with LSTTL outputs.
The HC132A can be used to enhance noise immunity or to square up
slowly changing waveforms.
Features Output Drive Capability: 10 LSTTL Loads Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 2.0 to 6.0 V Low Input Current: 1.0 �A High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements as Defined by JEDEC
Standard No. 7A Chip Complexity: 72 FETs or 18 Equivalent Gates Pb−Free Packages are Available*
Figure 1. Pin AssignmentVCC
GND
*For additional information on our Pb−Free strategy and soldering details, please
