MC74HC125AFR2 ,Quad With 3-State Outputs NonInverting BufferMAXIMUM RATINGS*Symbol Parameter Value UnitThis device contains protectioncircuitry to guard agains ..
MC74HC125AN ,Quad 3-State Noninverting BuffersMAXIMUM RATINGS*Symbol Parameter Value UnitThis device contains protectionÎÎÎcircuitry to guard aga ..
MC74HC126A ,Quad 3-State Non-Inverting BufferELECTRICAL CHARACTERISTICS (C = 50 pF, Input t = t = 6.0 ns)L r fGuaranteed LimitÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ..
MC74HC126ADR2 ,Quad 3-State Non-Inverting BufferMAXIMUM RATINGS*Symbol Parameter Value UnitÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎThis de ..
MC74HC126ADT ,Quad With 3-State Outputs NonInverting Buffer3MC74HC125A, MC74HC126ASWITCHING WAVEFORMSVCCOE (HC125A)50%t tr fGNDVCC90%VCCINPUT A 50%OE (HC126A) ..
MC74HC126AF ,Quad With 3-State Outputs NonInverting BufferELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)Guaranteed LimitÎV – 55 toCCÎÎÎÎÎSymbol Para ..
MCR25M ,Silicon Controlled RectifierELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)JCharacteristic Symbol Min Typ Max Unit ..
MCR25N ,Silicon Controlled RectifierMAXIMUM RATINGS (T = 25°C unless otherwise noted)JRating Symbol Value Unit4(1)Peak Repetitive Off–S ..
MCR265 ,Silicon Controlled RectifiersELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted.)CCharacteristic Symbol Min Typ Max Uni ..
MCR265 ,Silicon Controlled RectifiersMAXIMUM RATINGS (T = 25°C unless otherwise noted)JA KRating Symbol Value Unit(1)Peak Repetitive Off ..
MCR265-10 ,Thyristors**Order this documentSEMICONDUCTOR TECHNICAL DATA by MCR265-2/D*Silicon Controlled Rectifiers. . . ..
MCR265-10 ,ThyristorsMAXIMUM RATINGS (T = 25°C unless otherwise noted.)JRating Symbol Value Unit(1)Peak Repetitive Forwa ..
MC74HC125ADTEL-MC74HC125AFL1-MC74HC125AFL2-MC74HC125AFR1-MC74HC125AFR2-MC74HC126ADT-MC74HC126AF-MC74HC126AFL1
Quad With 3-State Outputs NonInverting Buffer
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High–Performance Silicon–Gate CMOSThe MC74HC125A and MC74HC126A are identical in pinout to
the LS125 and LS126. The device inputs are compatible with standard
CMOS outputs; with pullup resistors, they are compatible with
LSTTL outputs.
The HC125A and HC126A noninverting buffers are designed to be
used with 3–state memory address drivers, clock drivers, and other
bus–oriented systems. The devices have four separate output enables
that are active–low (HC125A) or active–high (HC126A). Output Drive Capability: 15 LSTTL Loads Outputs Directly Interface to CMOS, NMOS, and TTL Operating V oltage Range: 2.0 to 6.0 V Low Input Current: 1.0 μA High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC Standard
No. 7A Chip Complexity: 72 FETs or 18 Equivalent Gates
LOGIC DIAGRAM
HC125A
Active–Low Output Enables
HC126A
Active–High Output EnablesA1
OE1
OE2
OE3
OE4
PIN 14 = VCC
PIN 7 = GND
OE1
OE2
OE3
OE4
FUNCTION TABLE
