MC74HC11 ,Dual J-K Flip-Flop with Set and ResetELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ..
MC74HC11 ,Dual J-K Flip-Flop with Set and ResetELECTRICAL CHARACTERISTICS (C = 50 pF, Input t = t = 6 ns)L r fÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ..
MC74HC112 ,Dual J-K Flip-Flop with Set and ResetFeatures11 Output Drive Capability: 10 LSTTL Loads Outputs Directly Interface to CMOS, NMOS, and ..
MC74HC112 ,Dual J-K Flip-Flop with Set and ResetELECTRICAL CHARACTERISTICS (C = 50 pF, Input t = t = 6 ns)L r fGuaranteed Limit 55 toVCC25CV 85 ..
MC74HC112D ,Dual J-K Flip-Flop with Set and Reset**SEMICONDUCTOR TECHNICAL DATA* **High–Performance Silicon–Gate CMOSN SUFFIXPLASTIC PACKAGE16T ..
MC74HC112N ,Dual J-K Flip-Flop with Set and ResetMAXIMUM RATINGS*ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ..
MCR25M ,Silicon Controlled RectifierELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)JCharacteristic Symbol Min Typ Max Unit ..
MCR25N ,Silicon Controlled RectifierMAXIMUM RATINGS (T = 25°C unless otherwise noted)JRating Symbol Value Unit4(1)Peak Repetitive Off–S ..
MCR265 ,Silicon Controlled RectifiersELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted.)CCharacteristic Symbol Min Typ Max Uni ..
MCR265 ,Silicon Controlled RectifiersMAXIMUM RATINGS (T = 25°C unless otherwise noted)JA KRating Symbol Value Unit(1)Peak Repetitive Off ..
MCR265-10 ,Thyristors**Order this documentSEMICONDUCTOR TECHNICAL DATA by MCR265-2/D*Silicon Controlled Rectifiers. . . ..
MCR265-10 ,ThyristorsMAXIMUM RATINGS (T = 25°C unless otherwise noted.)JRating Symbol Value Unit(1)Peak Repetitive Forwa ..
MC74HC10-MC74HC10D-MC74HC10N
Triple 3-Input NAND Gate
SEMICONDUCTOR TECHNICAL DATA -
High–Performance Silicon–Gate CMOSThe MC74HC10 is identical in pinout to the LS10. The device inputs are
compatible with standard CMOS outputs; with pullup resistors, they are
compatible with LSTTL outputs. Output Drive Capability: 10 LSTTL Loads Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 2 to 6 V Low Input Current: 1 μA High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC Standard
No. 7A Chip Complexity: 36 FETs or 9 Equivalent Gates
LOGIC DIAGRAMPIN 14 = VCC
PIN 7 = GND
Y = ABC
