MC74ACT652DWR2 ,Octal Transceiver/Register With 3 State Outputs (Non Inverting)providing multiplexed transmission of data directly from the inputbus or from the internal storage ..
MC74ACT652N ,OCTAL TRANSCEIVER/ REGISTER WITH 3-STATE OUTPUTS (NON-INVERTING)MAXIMUM RATINGS*Symbol Parameter Value UnitV DC Supply Voltage (Referenced to GND) –0.5 to +7.0 VCC ..
MC74ACT74 ,Dual D-Type Positive Edge Trigger Flip-FlopMAXIMUM RATINGS*Symbol Parameter Value UnitV DC Supply Voltage (Referenced to GND) –0.5 to +7.0 VCC ..
MC74ACT74 ,Dual D-Type Positive Edge Trigger Flip-Flop3MC74AC74, MC74ACT74AC CHARACTERISTICS (For Figures and Waveforms – See Section 3 of the ON Semicon ..
MC74ACT74D ,Dual D-Type Positive Edge Trigger Flip-FlopMC74AC74, MC74ACT74Dual D-Type PositiveEdge-Triggered Flip-FlopThe MC74AC74/74ACT74 is a dual D–typ ..
MC74ACT74D ,Dual D-Type Positive Edge Trigger Flip-FlopLOGIC DIAGRAMSDD QCPQCDPlease note that this diagram is provided only for the understanding of logi ..
MCP604 , 2.7V to 5.5V Single Supply CMOS Op Amps
MCP6042 , 600 nA, Rail-to-Rail Input/Output Op Amps
MCP6242E , 50 uA, 550 kHz Rail-to-Rail Op Amp
MCP73855T-I/MF , USB Compatible Li-Ion/Li-Polymer Charge Management Controllers
MCP809M3-2.63 ,3-Pin Microprocessor Reset CircuitsPin DescriptionPIN NAME FUNCTION3 GND Ground referenceActive-low output. RESET remains low while V ..
MCP809M3-2.93 ,3-Pin Microprocessor Reset CircuitsPin DescriptionPIN NAME FUNCTION3 GND Ground referenceActive-low output. RESET remains low while V ..
MC74ACT652DWR2
Octal Transceiver/Register With 3 State Outputs (Non Inverting)
MC74AC652, MC74ACT652
Octal T ransceiver/Register
with 3-State Outputs
(Non-Inverting)
The MC74AC/ACT652 consists of registered bus transceiver
circuits, with outputs, D–type flip–flops and control circuitry
providing multiplexed transmission of data directly from the input
bus or from the internal storage registers. Data on the A or B bus will
be loaded into the respective registers on the LOW–to–HIGH
transition of the appropriate clock pin (CAB or CBA). The four
fundamental data handling functions available are illustrated in
Figures 1 to 4. Independent Registers for A and B Buses Multiplexed Real–Time and Stored Data Transfers Choice of True and Inverting Data Paths 3–State Outputs 300 mil Slim Dual–in–Line Package Outputs Source/Sink 24 mA ′ACT652 Has TTL Compatible Inputs
TRANSFER
FROM REGISTER TO BUS
A�BUS
B�BUS
REAL TIME TRANSFER
A�BUS TO B�BUS
A�BUS
B�BUS
REAL TIME TRANSFER
B�BUS TO A�BUS
A�BUS
B�BUS
Figure 1. Figure 2. STORAGE
FROM BUS TO REGISTER
A�BUS
B�BUS
Figure 3. Figure 4.
