MC74AC646DWR2 ,Octal Transceiver/Register with 3-State Outputs (Non-inverting)http://onsemi.com3MC74AC646, MC74ACT646DC CHARACTERISTICS 74AC 74ACT =AVCCSymbol Parameter T = +25 ..
MC74AC646DWR2 ,Octal Transceiver/Register with 3-State Outputs (Non-inverting)http://onsemi.comproviding multiplexed transmission of data directly from the inputbus or from the ..
MC74AC646N ,Octal Transceiver/Register with 3 State Outputs (Non Inverting)*OCTAL ** * * TRANSCEIVER/REGISTERWITH 3-STATE OUTPUTS*!** * *!*(NON-INVERTING)The MC74AC646/74ACT ..
MC74AC646N ,Octal Transceiver/Register with 3 State Outputs (Non Inverting)LOGIC DIAGRAMGCAB V1 24CCDIRCBASAB CBA2 23SBADIR SBA3 22CABSABA G4 210A B5 201 01 OF 8 CHANNELSDA B ..
MC74AC652DW ,OCTAL TRANSCEIVER/ REGISTER WITH 3-STATE OUTPUTS (NON-INVERTING)Maximum Ratings are those values beyond which damage to the device may occur. Functional operation ..
MC74AC74 ,Dual D-Type Positive Edge TriggerMAXIMUM RATINGS*Symbol Parameter Value UnitV DC Supply Voltage (Referenced to GND) –0.5 to +7.0 VCC ..
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MC74AC646-MC74AC646DWR2
Octal Transceiver/Register with 3-State Outputs (Non-inverting)
MC74AC646, MC74ACT646
Octal T ransceiver/Register
with 3-State Outputs
(Non-inverting)
The MC74AC646/74ACT646 consist of registered bus transceiver
circuits, with outputs, D–type flip–flops and control circuitry
providing multiplexed transmission of data directly from the input
bus or from the internal storage registers. Data on the A or B bus will
be loaded into the respective registers on the LOW–to–HIGH
transition of the appropriate clock pin (CAB or CBA). The four
fundamental data handling functions available are illustrated Figures
1 to 4. Independent Registers for A and B Buses Multiplexed Real–Time and Stored Data Transfers Choice of True and Inverting Data Paths 3–State Outputs 300 mil Slim Dual In–Line Package Outputs Source/Sink 24 mA ′ACT646 Has TTL Compatible Inputs
REAL TIME TRANSFER
A�BUS TO B�BUS
REAL TIME TRANSFER
B�BUS TO A�BUS
B�BUS B�BUS
A�BUS A�BUS
B�BUS B�BUS
A�BUS A�BUS
STORAGE
FROM BUS TO REGISTER
TRANSFER
FROM REGISTER TO BUS
Figure 1. Figure 2.
Figure 3. Figure 4.
