MC14503BDR2 ,Hex 3-State BufferLOGIC DIAGRAMAppropriate15DISABLE BDisableIn Input Outn n12 11IN 5 OUT 500 014 1310 1 IN 6 OUT 6X 1 ..
MC14503BF ,Hex Non-Inverting 3-State BufferELECTRICAL CHARACTERISTICS (Voltages Referenced to V )SSÎÎÎÎÎÎ – 55* CÎÎ 25* CÎÎÎÎÎ 125* CÎÎÎV VDD ..
MC14503BFEL ,Hex 3-State BufferELECTRICAL CHARACTERISTICS (Voltages Referenced to V )SSÎÎÎÎÎÎ – 55* CÎÎ 25* CÎÎÎÎÎ 125* CÎÎÎV VDD ..
MC145040DW , 8-Bit A/D Converters With Serial Interface
MC145040P , 8-Bit A/D Converters With Serial Interface
MC145041P , 8-Bit A/D Converters With Serial Interface
MC68HC705JP7CDW ,HCMOS Microcontroller Unit Freescale Semiconductor, Inc.MC68HC705JJ7/DREV 4MC68HC705JJ7MC68HC705JP7MC68HC705SJ7MC68HC705SP ..
MC68HC705K1CDW , HCMOS Microcontroller Unit
MC68HC705K1CDW , HCMOS Microcontroller Unit
MC68HC705KJ1CDW ,HCMOS Microcontroller UnitMC68HC705KJ1/DRev. 2.0HC 5MC68HC705KJ1MC68HSC705KJ1MC68HRC705KJ1MC68HLC705KJ1HCMOS Microcontroller ..
MC68HC705KJ1CP , Migrating from the MC68HC705K1 to the MC68HC705KJ1
MC68HC705KJ1CP , Migrating from the MC68HC705K1 to the MC68HC705KJ1
MC14503B-MC14503BDR2-MC14503BFEL
Hex 3-State Buffer
--The MC14503B is a hex non–inverting buffer with 3–state outputs,
and a high current source and sink capability. The 3–state outputs
make it useful in common bussing applications. Two disable controls
are provided. A high level on the Disable A input causes the outputs of
buffers 1 through 4 to go into a high impedance state and a high level
on the Disable B input causes the outputs of buffers 5 and 6 to go into a
high impedance state. 3–State Outputs TTL Compatible — Will Drive One TTL Load Over Full
Temperature Range Supply Voltage Range = 3.0 Vdc to 18 Vdc Two Disable Controls for Added Versatility Pin for Pin Replacement for MM80C97 and 340097
MAXIMUM RATINGS (Voltages Referenced to VSS) (Note 2.) Maximum Ratings are those values beyond which damage to the device
may occur. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high–impedance circuit. For proper operation, Vin and Vout should be constrained
to the range VSS (Vin or Vout) VDD.
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either VSS or VDD). Unused outputs must be left open.
