MC14069 ,Hex InverterLOGIC DIAGRAM CIRCUIT SCHEMATIC(1/6 OF CIRCUIT SHOWN) IN 3 5 10 OUT 5OUT 3 6 9 IN 41 2VDDV 7 8 OUT ..
MC14069UB ,Hex InverterMC14069UBHex InverterThe MC14069UB hex inverter is constructed with MOS P−channeland N−channel enha ..
MC14069UBCL ,Hex InverterMaximum Ratings are those values beyond which damage to the device may occur.IN 1 1 14 VDD†Temperat ..
MC14069UBCP ,Hex InverterMAXIMUM RATINGS* (Voltages Referenced to V )SSÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ..
MC14069UBCP. ,Hex InverterLogic Diagram Figure 2. Circuit Schematic20 ns 20 nsVDDVDD90%14OUTPUT 50%INPUTPULSE10%VSSGENERATORI ..
MC14069UBCP.. ,Hex InverterMAXIMUM RATINGS* (Voltages Referenced to V )SSÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ..
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MC68EC000FU10 ,Microprocessor, 16-/ 32-bit data and address registers, 16-Mbyte direct addressing range, memory-mapped input/output (I/O), 14 addressing modes, 10MHz
MC14069-MC14069UBCL-MC14069UBCP-MC14069UBCP..
Inverter Circuits
-The MC14069UB hex inverter is constructed with MOS P–channel and
N–channel enhancement mode devices in a single monolithic structure.
These inverters find primary use where low power dissipation and/or high
noise immunity is desired. Each of the six inverters is a single stage to
minimize propagation delays. Supply Voltage Range = 3.0 Vdc to 18 Vdc Capable of Driving Two Low–Power TTL Loads or One Low–Power
Schottky TTL Load Over the Rated Temperature Range Triple Diode Protection on All Inputs (see Page 5–2) Pin–for–Pin Replacement for CD4069UB Meets JEDEC UB Specifications
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ÎÎÎ Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125C
Ceramic “L” Packages: – 12 mW/ C From 100 C To 125C
CIRCUIT SCHEMATIC(1/6 OF CIRCUIT SHOWN)
LOGIC DIAGRAMVDD = PIN 14
VSS = PIN 7
VDD
VSS
OUTPUTINPUT* Double diode protection on all
inputs not shown.
20 ns
VDD
VSS
VOH
VOL
tTHL tTLH
OUTPUT
INPUT
tPHL tPLH
SEMICONDUCTOR TECHNICAL DATA
