MC14015BFR1 ,Dual 4-Bit Static Shift RegisterELECTRICAL CHARACTERISTICS (Voltages Referenced to V )SSÎÎÎÎÎÎ – 55* CÎÎ 25* CÎÎÎÎÎ 125* CÎÎÎV VDD ..
MC14016B ,Quad Analog Switch / Quad MultiplexerMAXIMUM RATINGS (Voltages Referenced to V )SS F SUFFIXAWLYWWCASE 965Symbol Parameter Value UnitV DC ..
MC14016BCL ,Quad analog switch/quad multiplexerLOGIC DIAGRAM RESTRICTIONS INV ≤ V ≤ VSS in DDV ≤ V ≤ VSS out DDREV 31/94 Motorola, Inc. 1995MOTOR ..
MC14016BCL ,Quad analog switch/quad multiplexerELECTRICAL CHARACTERISTICS (Voltages Referenced to V )SSÎÎÎΖ 55* C 25* C 125* CV VD DD DÎÎÎÎÎVdc V ..
MC14016BCP ,Quad analog switch/quad multiplexerMAXIMUM RATINGS* (Voltages Referenced to V )SSÎÎ
MC14016BD ,Quad analog switch/quad multiplexerMC14016BQuad Analog Switch/Quad MultiplexerThe MC14016B quad bilateral switch is constructed with M ..
MC68175 ,MC68175 FLEXchip Signal Processor Advance Information
MC68194FJ ,Carrier Band Modem(CBM)(l)) M OTOROLATechnical SummaryCarrierband Modem (CBM)The bipolar LSI MC68194 Carrierband Modem (CB ..
MC68194FJ ,Carrier Band Modem(CBM)(l)) M OTOROLATechnical SummaryCarrierband Modem (CBM)The bipolar LSI MC68194 Carrierband Modem (CB ..
MC6821CL ,Peripherial interface adapterMAXIMUM RATINGS 'Characteristics Symbol Unit_—-o.3w +7.0—_-o.3m +7.0AOperating Temperature Range TL ..
MC6821CP ,Peripherial interface adapterELECTRICAL CHARACTERISTICS lVCCs=5.0 Vdc 15%, Vss--0, TA=TL to TH unless otherwise noted)..mmm Unit ..
MC6821CP ,Peripherial interface adapterQ49 MOTOROLAM06821PERIPHERAL INTERFACE ADAPTER (PIA)MOSThe MC6821 Peripheral Interface Adapter prov ..
MC14015BFR1
Dual 4-Bit Static Shift Register
---The MC14015B dual 4–bit static shift register is constructed with
MOS P–channel and N–channel enhancement mode devices in a
single monolithic structure. It consists of two identical, independent
4–state serial–input/parallel–output registers. Each register has
independent Clock and Reset inputs with a single serial Data input.
The register states are type D master–slave flip–flops. Data is shifted
from one stage to the next during the positive–going clock transition.
Each register can be cleared when a high level is applied on the Reset
line. These complementary MOS shift registers find primary use in
buffer storage and serial–to–parallel conversion where low power
dissipation and/or noise immunity is desired. Diode Protection on All Inputs Supply Voltage Range = 3.0 Vdc to 18 Vdc Logic Edge–Clocked Flip–Flop Design —
Logic state is retained indefinitely with clock level either high or low;
information is transferred to the output only on the positive going
edge of the clock pulse. Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range.
MAXIMUM RATINGS (Voltages Referenced to VSS) (Note 2.) Maximum Ratings are those values beyond which damage to the device
may occur. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high–impedance circuit. For proper operation, Vin and Vout should be constrained
to the range VSS (Vin or Vout) VDD.
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either VSS or VDD). Unused outputs must be left open.
