MC14011UBDG ,UB-Suffix Series CMOS GatesELECTRICAL CHARACTERISTICS (Voltages Referenced to V )SSÎÎÎÎÎÎ − 55CÎÎ 25CÎÎÎÎÎ 125CÎÎÎV VDDChar ..
MC14011UBDR2G ,UB-Suffix Series CMOS GatesMaximum ratings applied to the device are individual stress limit values (notnormal operating condi ..
MC14012B ,B-Suffix Series CMOS Gates**SEMICONDUCTOR TECHNICAL DATA%** !%$ **$*%& **"**# * **$*#**The B Series logic gates are constru ..
MC14012BCL ,Dual 4-input NAND gateMaximum Ratings are those values beyond which damage to the device may occur.*%** !%$ **$*ÎÎΆTem ..
MC14012BCL ,Dual 4-input NAND gateMAXIMUM RATINGS* (Voltages Referenced to V )SS "*!** * !%$ **$*ÎÎSymbol Parameter Value UnitÎÎÎÎÎ ..
MC14012BCL ,Dual 4-input NAND gate**SEMICONDUCTOR TECHNICAL DATA%** !%$ **$*%& **"**# * **$*#**The B Series logic gates are constru ..
MC6803CP ,1.0MHz; V(cc / in): -0.3 to +7.0V; 8-bit single-chip microcomputer (MCU)0 MOTOROLAM06801M06803SEMI CO N D U CTOR S35-01%;50 $LUESTE1NB§~VDW AUSTIN, TEXAS '73723' .MICROCOM ..
MC6803CP ,1.0MHz; V(cc / in): -0.3 to +7.0V; 8-bit single-chip microcomputer (MCU)0 MOTOROLAM06801M06803SEMI CO N D U CTOR S35-01%;50 $LUESTE1NB§~VDW AUSTIN, TEXAS '73723' .MICROCOM ..
MC6803CP-1 ,1.25MHz; V(cc / in): -0.3 to +7.0V; 8-bit single-chip microcomputer (MCU)BLOCK DIAGRAM.-LUElo‘mm‘ZE 0:T-lt/IW]tnt/IXDU)0U)>>ModeExpanded Multipiexed MPUExpanded Non-Multipl ..
MC6803L ,1.0MHz; V(cc / in): -0.3 to +7.0V; 8-bit single-chip microcomputer (MCU)BLOCK DIAGRAM.-LUElo‘mm‘ZE 0:T-lt/IW]tnt/IXDU)0U)>>ModeExpanded Multipiexed MPUExpanded Non-Multipl ..
MC6803P ,1.0MHz; V(cc / in): -0.3 to +7.0V; 8-bit single-chip microcomputer (MCU)MAXIMUM RATINGSSupply Voltage m —0.3 to +7.0 “Input Voltage m -O.3 to +7.0 nOperating Temperature R ..
MC6803P1 ,1.25MHz; V(cc / in): -0.3 to +7.0V; 8-bit single-chip microcomputer (MCU)0 MOTOROLAM06801M06803SEMI CO N D U CTOR S35-01%;50 $LUESTE1NB§~VDW AUSTIN, TEXAS '73723' .MICROCOM ..
MC14011UBDG-MC14011UBDR2G
UB-Suffix Series CMOS Gates
MC14001UB, MC14011UB
UB-Suffix Series
CMOS Gates
The UB Series logic gates are constructed with P and N channel
enhancement mode devices in a single monolithic structure
(Complementary MOS). Their primary use is where low power
dissipation and/or high noise immunity is desired. The UB set of
CMOS gates are inverting non−buffered functions.
Features Supply Voltage Range = 3.0 Vdc to 18 Vdc Linear and Oscillator Applications Capable of Driving Two Low−Power TTL Loads or One
Low−Power Schottky TTL Load Over the Rated Temperature Range Double Diode Protection on All Inputs Pin−for−Pin Replacements for Corresponding CD4000 Series UB
Suffix Devices Pb−Free Packages are Available*
MAXIMUM RATINGS (Voltages Referenced to VSS)Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/�C From 65�C To 125�C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, Vin and Vout should be constrained
to the range VSS � (Vin or Vout) � VDD.
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either VSS or VDD). Unused outputs must be left open.
