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MC10H209LMOTOROLAN/a239avaiDual 4-5-Input OR/NOR Gate
MC10H209MMOTN/a10avaiDual 4-5-Input OR/NOR Gate
MC10H209PMOT ?N/a13avaiDual 4-5-Input OR/NOR Gate


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MC10H209L-MC10H209M-MC10H209P
Dual 4-5-Input OR/NOR Gate
SEMICONDUCTOR TECHNICAL DATA -
The MC10H209 is a Dual 4–5–input OR/NOR gate. This MECL part is a
functional/pinout duplication of the MECL III part MC1688. Propagation Delay Average, 0.75 ns Typical Power Dissipation 125 mW Typical Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range) Voltage Compensated MECL 10K–Compatible
MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS (VEE = –5.2 V ±5%) (See Note)
AC PARAMETERS
NOTE:

Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,
after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed
circuit board and transverse air flow greater than 500 Ifpm is maintained. Outputs are terminated through
a 50–ohm resistor to –2.0 volts.
DIP
PIN ASSIGNMENT

VCC1
AOUT
AOUT
AIN
AIN
AIN
AIN
VEE
VCC2
BOUT
BOUT
BIN
BIN
BIN
BIN
BIN
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
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