MC10H161FN ,Binary to 1-8 Decoder (Low)MAXIMUM RATINGS13 Q4Characteristic Symbol Rating UnitB912 Q5Power Supply (V = 0) V –8.0 to 0 VdcCC ..
MC10H161FNR2 ,Binary to 1-8 Decoder (Low)
MC10H161FNR2 ,Binary to 1-8 Decoder (Low)
MC10H161L ,Binary to 1-8 Decoder (Low)MAXIMUM RATINGS13 Q4Characteristic Symbol Rating UnitB912 Q5Power Supply (V = 0) V –8.0 to 0 VdcCC ..
MC10H161M ,Binary to 1-8 Decoder (Low)3MC10H161PACKAGE DIMENSIONSPLCC–20FN SUFFIXPLASTIC PLCC PACKAGECASE 775–02ISSUE CM S S0.007 (0.180) ..
MC10H161MEL ,Binary to 1-8 Decoder (Low)
MC3486N ,Quadruple Differential Line Receiver With 3-State OutputsMC3486 QUADRUPLE DIFFERENTIAL LINE RECEIVERWITH 3-STATE OUTPUTSSLLS097C – JUNE 1980 – REVISED FEBRU ..
MC3486NSR ,Quadruple Differential Line Receiver With 3-State Outputsmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage, V ..
MC3486P ,QUAD EIA-422/3 LINE RECEIVER WITH THREE-STATE OUPUTSfeatures include:0 Four Independent Receiver Chains D SUFFIXo Three-State Outputs PLASTIC PACKAGE a ..
MC3487 ,Quadruple Differential Line Drivermaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage, V ..
MC3487D ,QUAD EIA-422 LINE DRIVER WITH THREE-STATE OUTPUTSMAXIMUM RATINGSRating Symbol Value UnitPower Supply Voltage V 8.0 VdcCCInput Voltage V 5.5 VdcIOper ..
MC3487DR ,Quadruple Differential Line Driverlogic diagram (positive logic)41,2EN21 1Y1A 31Z67 2Y2A 52Z123,4EN109 3Y3A 113Z1415 4Y4A 134Zschemat ..
MC10H161FN-MC10H161P
Binary to 1-8 Decoder( Low )
SEMICONDUCTOR TECHNICAL DATA -
The MC10H161 provides parallel decoding of a three bit binary word to one
of eight lines. The MC10H161 is useful in high–speed multiplexer/demultiplexer
applications.
The MC10H161 is designed to decode a three bit input word to one of eight
output lines. The MC10H161 output will be low when selected while all other
output are high. The enable inputs, when either or both are high, force all
outputs high.
The MC10H161 is a true parallel decoder. This eliminates unequal parallel
path delay times found in other decoder designs. These devices are ideally
suited for multiplexer/demultiplexer applications. Propagation Delay, 1.0 ns Typical Power Dissipation, 315 mW Typical (same as MECL 10K) Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range) Voltage Compensated MECL 10K–Compatible
MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS (VEE = –5.2 V ±5%) (See Note)
AC PARAMETERS
NOTE:Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,
DIP
PIN ASSIGNMENTVCC1
VEE
VCC2
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
