MC10H135L ,Dual J-K Master-Slave Flip-FlopMAXIMUM RATINGSQ1 2J1 7Characteristic Symbol Rating UnitK1 6Q1 3Power Supply (V = 0) V –8.0 to ..
MC10H135M ,Dual J-K Master-Slave Flip-Flop2AN1672/DSection 1: Translation Between Differently Supplied ECL Drivers and ReceiversTable 3. Tran ..
MC10H135M ,Dual J-K Master-Slave Flip-FlopAN1672/DThe ECL Translator GuidePECL • LVPECL • NECL • TTL •LVTTL/LVCMOS • CMOS
MC10H135P ,Dual J-K Master-Slave Flip-FlopMAXIMUM RATINGSQ1 2J1 7Characteristic Symbol Rating UnitK1 6Q1 3Power Supply (V = 0) V –8.0 to ..
MC10H136 ,Universal Hexidecimal CounterPrepared byCleon PettyAPPLICATION NOTETodd PearsonECL Applications EngineeringThis application note ..
MC10H136FN ,Universal Hexidecimal CounterELECTRICAL CHARACTERISTICS (V = –5.2 V ±5%) (See Note)EEINPUTS OUTPUTS0° 25° 75°Carry ClockCarryS1 ..
MC3450DR ,Quad Differential Line Receivers 14-SOIC
MC3456 ,DUAL TIMING CIRCUITOrder this document by MC3456/D* *The MC3456 dual timing circuit is a highly stable controller cap ..
MC3456P ,Dual Timing CircuitOrder this document by MC3456/D* *The MC3456 dual timing circuit is a highly stable controller cap ..
MC3458 ,Amplifiers and Comparators
MC3458 ,Amplifiers and Comparators
MC3458DR2 ,Dual, Low Power Operational AmplifierMAXIMUM RATINGSOutput A 1 8 VCCRating Symbol Value Unit2 7Output BPower Supply Voltages Vdc–Inputs ..
MC10H135L-MC10H135P
Dual J-K Master-Slave Flip-Flop
SEMICONDUCTOR TECHNICAL DATA -
The MC10H135 is a dual J–K master–slave flip–flop. The device is provided
with an asynchronous set(s) and reset(R). These set and reset inputs overide
the clock.
A common clock is provided with separate J–K inputs. When the clock is
static, the JK inputs do not effect the output. The output states of the flip flop
change on the positive transition of the clock. Propagation delay, 1.5 ns Typical • Improved Noise Margin 150 Power Dissipation, 280 mW mV (Over Operating Voltage
Typical/Pkg. (No Load) and Temperature Range) ftog 250 MHz Max• Voltage Compensated MECL 10K–Compatible
MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS (VEE = –5.2 V ±5%) (See Note)
AC PARAMETERS
NOTE:Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,
DIP PIN ASSIGNMENTVCC1
VEE
VCC2
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
